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| author | Vadim Bendebury <vbendeb@chromium.org> | 2019-02-28 20:05:27 -0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2019-04-05 09:21:44 -0700 |
| commit | 1d6c7bb9773f76aa70ce65822fa001ff72892cd2 (patch) | |
| tree | 3631462d9540df08d13cffa9a7f8e7e9bb3e7899 /chip/host | |
| parent | 63bf8f8ba87b23378391b147f1b3e9fdcf3d8dc5 (diff) | |
| download | chrome-ec-1d6c7bb9773f76aa70ce65822fa001ff72892cd2.tar.gz | |
nvmem: test modifications to support the new scheme
This patch includes changes to support testing of the new nvmem
implementation.
Making fizz compatible required duplicating a lot of functionality
available in the test/ directory (fuzz/nvmem_tpm2_mock.c is very
similar to test/nvmem_tpm2_mock.c), but I could not find an easy way
to avoid it.
BRANCH=cr50, cr50-mp
BUG=b:69907320, b:129710256
CQ-DEPEND=CL:1496607
TEST=with the rest of the patches applied 'make buildall -j' succeeds,
which confirms both test and fuzz success.
Change-Id: Ife999b04d22f8ddbe9ea5d35f4c3e21f57592754
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1450278
Reviewed-by: Andrey Pronin <apronin@chromium.org>
Diffstat (limited to 'chip/host')
| -rw-r--r-- | chip/host/config_chip.h | 18 |
1 files changed, 12 insertions, 6 deletions
diff --git a/chip/host/config_chip.h b/chip/host/config_chip.h index 8714b57891..f2b7e29416 100644 --- a/chip/host/config_chip.h +++ b/chip/host/config_chip.h @@ -9,15 +9,21 @@ #define __CROS_EC_CONFIG_CHIP_H /* Memory mapping */ +#if !defined(TEST_NVMEM) && !defined(TEST_CR50_FUZZ) #define CONFIG_FLASH_SIZE 0x00020000 +#define CONFIG_FLASH_BANK_SIZE 0x1000 +#else +#define CONFIG_FLASH_SIZE (512 * 1024) +#define CONFIG_FLASH_BANK_SIZE 0x800 +#endif + extern char __host_flash[CONFIG_FLASH_SIZE]; -#define CONFIG_PROGRAM_MEMORY_BASE ((uintptr_t)__host_flash) -#define CONFIG_FLASH_BANK_SIZE 0x1000 -#define CONFIG_FLASH_ERASE_SIZE 0x0010 /* erase bank size */ -#define CONFIG_FLASH_WRITE_SIZE 0x0002 /* minimum write size */ -#define CONFIG_FLASH_WRITE_IDEAL_SIZE 0x0080 /* ideal write size */ -#define CONFIG_RAM_BASE 0x0 /* Not supported */ +#define CONFIG_PROGRAM_MEMORY_BASE ((uintptr_t)__host_flash) +#define CONFIG_FLASH_ERASE_SIZE 0x0010 /* erase bank size */ +#define CONFIG_FLASH_WRITE_SIZE 0x0002 /* minimum write size */ +#define CONFIG_FLASH_WRITE_IDEAL_SIZE 0x0080 /* ideal write size */ +#define CONFIG_RAM_BASE 0x0 /* Not supported */ #define CONFIG_RAM_SIZE 0x0 /* Not supported */ #define CONFIG_FPU |