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authorJack Rosenthal <jrosenth@chromium.org>2019-04-26 14:40:09 -0600
committerchrome-bot <chrome-bot@chromium.org>2019-05-01 01:50:28 -0700
commit289bbc2855f38aaffd3fc763f62afee07ab9a666 (patch)
tree6646e48cfa96be3c2d5c82f8698d426b2eed65c3 /chip/ish/aontaskfw
parenta24c74c759ba98df67935a344e31dfe494605237 (diff)
downloadchrome-ec-289bbc2855f38aaffd3fc763f62afee07ab9a666.tar.gz
ish: move REG32 macros for interrupt control into header files
This is a good portion of the fixes needed for b:130573158, but we still have the HECI registers to deal with. I have those in a separate CL as they were giving me a significant amount of trouble. BUG=b:130573158 BRANCH=none TEST=arcada_ish is functioning as normal after changes Change-Id: I9c209a329d61f7f55c260006cdffbfc705521195 Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1586458 Reviewed-by: Jett Rink <jettrink@chromium.org>
Diffstat (limited to 'chip/ish/aontaskfw')
-rw-r--r--chip/ish/aontaskfw/ish_aontask.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/chip/ish/aontaskfw/ish_aontask.c b/chip/ish/aontaskfw/ish_aontask.c
index 374497b1ba..4bfd6fcab4 100644
--- a/chip/ish/aontaskfw/ish_aontask.c
+++ b/chip/ish/aontaskfw/ish_aontask.c
@@ -85,8 +85,8 @@ static void pmu_wakeup_isr(void)
* Indicate completion of servicing the interrupt to IOAPIC first
* then indicate completion of servicing the interrupt to LAPIC
*/
- REG32(IOAPIC_EOI_REG) = ISH_PMU_WAKEUP_VEC;
- REG32(LAPIC_EOI_REG) = 0x0;
+ IOAPIC_EOI_REG = ISH_PMU_WAKEUP_VEC;
+ LAPIC_EOI_REG = 0x0;
__asm__ volatile ("iret;");
@@ -105,8 +105,8 @@ static void reset_prep_isr(void)
* Indicate completion of servicing the interrupt to IOAPIC first
* then indicate completion of servicing the interrupt to LAPIC
*/
- REG32(IOAPIC_EOI_REG) = ISH_RESET_PREP_VEC;
- REG32(LAPIC_EOI_REG) = 0x0;
+ IOAPIC_EOI_REG = ISH_RESET_PREP_VEC;
+ LAPIC_EOI_REG = 0x0;
handle_reset(ISH_PM_STATE_RESET_PREP);