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| author | Hu, Hebo <hebo.hu@intel.com> | 2019-03-08 15:34:21 +0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2019-04-08 02:51:29 -0700 |
| commit | 6a184d5019f0b45fe692da09a14e9ce7c853d68c (patch) | |
| tree | 541192356148342f09bacebb75bea95027e98e7d /chip/ish/config_chip.h | |
| parent | d0a350e6691a9d93138051e2aa00e0d6c26151b5 (diff) | |
| download | chrome-ec-6a184d5019f0b45fe692da09a14e9ce7c853d68c.tar.gz | |
ish/ish5: implement AON low power management framework
AON PM framework including:
1: AON task skeleton
2: task switching between main FW and AON task
3: 'idlestats' console command for D0ix statistic information
4: D0ix entrance in idle task
BUG=b:122364080
BRANCH=none
TEST=tested on arcada
Change-Id: Iefa9e067892d5c42d9f0c795275fe88e5a36115b
Signed-off-by: Hu, Hebo <hebo.hu@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1510518
Commit-Ready: Rushikesh S Kadam <rushikesh.s.kadam@intel.com>
Commit-Ready: Hebo Hu <hebo.hu@intel.corp-partner.google.com>
Tested-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Hebo Hu <hebo.hu@intel.corp-partner.google.com>
Diffstat (limited to 'chip/ish/config_chip.h')
| -rw-r--r-- | chip/ish/config_chip.h | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/chip/ish/config_chip.h b/chip/ish/config_chip.h index d10ee650d6..93cc527f6b 100644 --- a/chip/ish/config_chip.h +++ b/chip/ish/config_chip.h @@ -36,6 +36,28 @@ #define CONFIG_ISH_SRAM_SIZE (CONFIG_ISH_SRAM_BASE_END - \ CONFIG_ISH_SRAM_BASE_START) +#if defined(CHIP_FAMILY_ISH3) +/* on ISH3, there is no seprated aon memory, using last 4KB of normal memory + * without poweroff + */ +#define CONFIG_ISH_AON_SRAM_BASE_START 0xFF09F000 +#define CONFIG_ISH_AON_SRAM_BASE_END 0xFF0A0000 +#elif defined(CHIP_FAMILY_ISH4) +#define CONFIG_ISH_AON_SRAM_BASE_START 0xFF800000 +#define CONFIG_ISH_AON_SRAM_BASE_END 0xFF801000 +#else +#define CONFIG_ISH_AON_SRAM_BASE_START 0xFF800000 +#define CONFIG_ISH_AON_SRAM_BASE_END 0xFF802000 +#endif + +#define CONFIG_ISH_AON_SRAM_SIZE (CONFIG_ISH_AON_SRAM_BASE_END - \ + CONFIG_ISH_AON_SRAM_BASE_START) + +/* reserve for readonly use in the last of AON memory */ +#define CONFIG_ISH_AON_SRAM_ROM_SIZE 0x80 +#define CONFIG_ISH_AON_SRAM_ROM_START (CONFIG_ISH_AON_SRAM_BASE_END - \ + CONFIG_ISH_AON_SRAM_ROM_SIZE) + /* Required for panic_output */ #define CONFIG_RAM_SIZE CONFIG_ISH_SRAM_SIZE #define CONFIG_RAM_BASE CONFIG_ISH_SRAM_BASE_START |