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authorHyungwoo Yang <hyungwoo.yang@intel.com>2019-05-14 09:31:48 -0700
committerchrome-bot <chrome-bot@chromium.org>2019-05-14 23:57:40 -0700
commitf2dcc64ad4d7f2bca17410e8b2036f31b0499745 (patch)
treed754f4224a9b51255a8341146fb99f45752ee4d0 /chip/ish/gpio.c
parenta84d8055a57fe95c38df2ae1be332c57475aec27 (diff)
downloadchrome-ec-f2dcc64ad4d7f2bca17410e8b2036f31b0499745.tar.gz
ish: fix GPIO interrupt enabling and status
currently the GPIO interrupt mask register and status register are not initialized on warm reset. so some interrupts can be enabled even before corresponding things are ready. this patch disables all GPIO interrupts and clears pending interrupts during gpio initialization(gpio_pre_init()). BRANCH=ish BUG=b:130717887 TEST=tested on Arcada platform Change-Id: I01c237f667c7a3b6d1eb63d81c9ab604a6213453 Reviewed-on: https://chromium-review.googlesource.com/1611749 Commit-Ready: Jett Rink <jettrink@chromium.org> Tested-by: Hyungwoo Yang <hyungwoo.yang@intel.com> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Diffstat (limited to 'chip/ish/gpio.c')
-rw-r--r--chip/ish/gpio.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/chip/ish/gpio.c b/chip/ish/gpio.c
index 7d0a34f18f..18890c111d 100644
--- a/chip/ish/gpio.c
+++ b/chip/ish/gpio.c
@@ -139,6 +139,11 @@ void gpio_pre_init(void)
gpio_set_flags_by_mask(g->port, g->mask, flags);
}
+
+ /* disable GPIO interrupts */
+ ISH_GPIO_GIMR = 0;
+ /* clear pending GPIO interrupts */
+ ISH_GPIO_GISR = 0xFFFFFFFF;
}
static void gpio_init(void)