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authorHyungwoo Yang <hyungwoo.yang@intel.com>2019-05-02 00:25:26 -0700
committerchrome-bot <chrome-bot@chromium.org>2019-05-03 02:11:24 -0700
commit3081e4a737875bf35d8cd8e357283a4968611de4 (patch)
tree6a4099aec56dde12d67fb9b575815db8e3454e2b /chip/ish/hwtimer.c
parent8e8dd8a8e4a0556b67f2ceed6b0fe1547989d924 (diff)
downloadchrome-ec-3081e4a737875bf35d8cd8e357283a4968611de4.tar.gz
ish: make sure last_deadline always valid
If there's no timer event with current clksrc_high then last_deadline should have the maximum value(0xFFFFFFFF) within the clksrc_high since we always get timer event at every new clk_high. BRANCH=none BUG=none TEST=Tested in Arcada platform Change-Id: Iebea955b1aefc7d986b493a8be84b8fd25812441 Signed-off-by: Hyungwoo Yang <hyungwoo.yang@intel.com> Reviewed-on: https://chromium-review.googlesource.com/1593092 Commit-Ready: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Diffstat (limited to 'chip/ish/hwtimer.c')
-rw-r--r--chip/ish/hwtimer.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/chip/ish/hwtimer.c b/chip/ish/hwtimer.c
index 6cd4f854bf..d3d78cadd6 100644
--- a/chip/ish/hwtimer.c
+++ b/chip/ish/hwtimer.c
@@ -191,6 +191,12 @@ uint32_t __hw_clock_event_get(void)
void __hw_clock_event_clear(void)
{
+ /*
+ * we get timer event at every new clksrc_high.
+ * so when there's no event, last_dealine should be
+ * the last value within current clksrc_high.
+ */
+ last_deadline = 0xFFFFFFFF;
wait_while_settling(HPET_T1_SETTLING);
HPET_TIMER_CONF_CAP(1) &= ~HPET_Tn_INT_ENB_CNF;
}
@@ -281,6 +287,9 @@ int __hw_clock_source_init(uint32_t start_t)
timer0_config |= HPET_Tn_INT_TYPE_CNF;
timer1_config |= HPET_Tn_INT_TYPE_CNF;
+ /* no event until next timer 0 IRQ for clksrc_high++ */
+ last_deadline = 0xFFFFFFFF;
+
/* Enable interrupt */
timer0_config |= HPET_Tn_INT_ENB_CNF;