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| author | li feng <li1.feng@intel.com> | 2019-02-08 19:36:07 -0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2019-02-20 21:41:46 -0800 |
| commit | c8df3ef42411181d99fa71cb8af53498995a1123 (patch) | |
| tree | 1a8781c18861cff1686f6ba4a33b128fd9a774a8 /chip/ish/ipc_heci.c | |
| parent | 153c90a2026f1ae56705e4880e2461354d1ac9af (diff) | |
| download | chrome-ec-c8df3ef42411181d99fa71cb8af53498995a1123.tar.gz | |
ish: update power rail request (vnn)
When the AP is trying to go down to S0ix from S0 (suspend), we need to
ensure that the ISH is not holding on to any power requests which would
prevent the AP from transitioning to S0ix. Re-assert power request when
AP enters resume back to S0.
Ultimately, the VNN will be controlled at a much finer grain once more
power management features are introduces here for the ISH.
BRANCH=none
BUG=b:123890178
TEST=run "suspend_stress_test -c [loop#]", and pass; this is
workaround to fix this issue so not blocking S0ix test.
Change-Id: I881f3505300cadf1e0b8dd1750bae4cf2876e514
Signed-off-by: li feng <li1.feng@intel.com>
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1461665
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Edward Hill <ecgh@chromium.org>
Diffstat (limited to 'chip/ish/ipc_heci.c')
| -rw-r--r-- | chip/ish/ipc_heci.c | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/chip/ish/ipc_heci.c b/chip/ish/ipc_heci.c index e336994936..9574f38799 100644 --- a/chip/ish/ipc_heci.c +++ b/chip/ish/ipc_heci.c @@ -468,6 +468,20 @@ static void ipc_host2ish_isr(void) uint32_t pisr = REG32(IPC_PISR); uint32_t pimr = REG32(IPC_PIMR); +#ifdef CHIP_FAMILY_ISH5 + /* + * TODO(b/122364080): Remove this code once proper power management is + * in place for ISH. + * + * Ensure that the host IPC power is requested after getting an + * interrupt otherwise the resume message will never get delivered (via + * host ipc communication). Resume is where we would like to restore all + * power settings, but that is too late for this power request. + */ + + PMU_VNN_REQ = VNN_REQ_IPC_HOST_WRITE & ~PMU_VNN_REQ; +#endif + if ((pisr & IPC_PISR_HOST2ISH_BIT) && (pimr & IPC_PIMR_HOST2ISH_BIT)) handle_msg_recv_interrupt(IPC_PEER_ID_HOST); } @@ -696,6 +710,17 @@ void ipc_mng_task(void) struct ipc_msg msg; ipc_handle_t handle; +#ifdef CHIP_FAMILY_ISH5 + /* + * TODO(b/122364080): Remove this code once proper power management is + * in place for ISH. + * + * Ensure that power for host IPCs is requested and ack'ed + */ + PMU_VNN_REQ = VNN_REQ_IPC_HOST_WRITE & ~PMU_VNN_REQ; + while (!(PMU_VNN_REQ_ACK & PMU_VNN_REQ_ACK_STATUS)) + continue; +#endif handle = ipc_open(IPC_PEER_ID_HOST, IPC_PROTOCOL_MNG, EVENT_FLAG_BIT_MNG_MSG); |