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author | Jack Rosenthal <jrosenth@chromium.org> | 2019-05-10 11:48:29 -0600 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2019-05-16 09:04:10 -0700 |
commit | 6b34ae8f4703a7b8646db5b907f85ecba4c3f9ec (patch) | |
tree | d1a5ea93c4b4d8a95ab615c973d4a9afce0ec7fe /chip/ish/registers.h | |
parent | 822c33d6ff03ee4343c4b2edce8aa70663be6a96 (diff) | |
download | chrome-ec-6b34ae8f4703a7b8646db5b907f85ecba4c3f9ec.tar.gz |
ish: save and restore reset flags across reset
In order to implement watchdog reset counter, we need to be saving and
restoring reset flags. b:132457636 explains the details of the memory
layout chosen for the soft-register.
BUG=b:132366384,b:132457636
BRANCH=none
TEST=reset arcada_ish using: `reboot' command, watchdog expiration,
and cold-reset, observed the correct value for "reset cause" printed
during boot
Change-Id: I84b965803d37703fac6494fb55a97c674ce64b89
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1606074
Reviewed-by: Jett Rink <jettrink@chromium.org>
Diffstat (limited to 'chip/ish/registers.h')
-rw-r--r-- | chip/ish/registers.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/chip/ish/registers.h b/chip/ish/registers.h index b00cce72e5..eb028b403d 100644 --- a/chip/ish/registers.h +++ b/chip/ish/registers.h @@ -338,6 +338,10 @@ enum ish_i2c_port { /* Software defined registers */ +/* Persistent reset flags - placed directly at end of panic data */ +#define ISH_RESET_FLAGS REG32(CONFIG_PANIC_DATA_BASE \ + + CONFIG_PANIC_DATA_SIZE) + #if defined(CHIP_FAMILY_ISH3) /* on ISH3, reused ISH2PMC IPC message registers */ #define SNOWBALL_BASE IPC_ISH2PMC_MSG_BASE |