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| author | Leifu Zhao <leifu.zhao@intel.com> | 2021-01-04 11:51:45 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-01-07 17:34:16 +0000 |
| commit | 4c26c0ac77495e559db3fb667f7019b87c7c48b1 (patch) | |
| tree | bd39830dc4934fc63204166e855b1b5a87a951e8 /chip/ish/registers.h | |
| parent | fd05db2ff2bd3382ae2207005602910204afd713 (diff) | |
| download | chrome-ec-4c26c0ac77495e559db3fb667f7019b87c7c48b1.tar.gz | |
ish: enable GPIO wake from low power state
Enable GPIO wake from low power state for ish 5.4 on tgl rvp.
BUG=b:176670515
BRANCH=none
TEST=Sensor GPIO interurpt can successfully wake up ish.
Signed-off-by: Leifu Zhao <leifu.zhao@intel.com>
Change-Id: Id3eb997ad8dded95c154250e64cd3a5b287bb3d2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2607953
Reviewed-by: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Tested-by: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com>
Commit-Queue: Jett Rink <jettrink@chromium.org>
Auto-Submit: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com>
Diffstat (limited to 'chip/ish/registers.h')
| -rw-r--r-- | chip/ish/registers.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/chip/ish/registers.h b/chip/ish/registers.h index 258abe33ef..08f1ce6ea3 100644 --- a/chip/ish/registers.h +++ b/chip/ish/registers.h @@ -234,6 +234,9 @@ enum ish_i2c_port { #define PMU_BME_BIT_FALLING_EDGE_MASK BIT(28) #endif +#define PMU_GPIO_WAKE_MASK0 REG32(ISH_PMU_BASE + 0x250) +#define PMU_GPIO_WAKE_MASK1 REG32(ISH_PMU_BASE + 0x254) + #define PMU_ISH_FABRIC_CNT REG32(ISH_PMU_BASE + 0x18) #define PMU_PGCB_CLKGATE_CTRL REG32(ISH_PMU_BASE + 0x54) |