ish: Add support for ISH chip

This patch adds the initial support for ISH chip to enable the EC
firmware to boot on Intel Integrated Sensor Hub (ISH). The following are
enabled:

1. Inter-Processor Communication (IPC) driver that enables the ISH to
communicate with the host Operating system via shared registers.
2. High Precision Event Timer (HPET) driver that provides configurable
timers for the FW to use in task scheduling.
3. I2C bus driver for accessing sensors.
4. UART console driver with TX support only.

BUG=chrome-os-partner:51851
BRANCH=None
TEST=`make buildall -j`

Change-Id: I15d4c201b799cfa79bed220ee573b75f5cd7b1f7
Signed-off-by: Jaiber John <jaiber.j.john@intel.com>
Signed-off-by: Alex Brill <alexander.brill@intel.com>
Signed-off-by: Gomathi Kumar <gomathi.kumar@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/336710
Commit-Ready: Raj Mojumder <raj.mojumder@intel.com>
Tested-by: Jaiber J John <jaiber.j.john@intel.com>
Tested-by: Raj Mojumder <raj.mojumder@intel.com>
Reviewed-by: Jaiber J John <jaiber.j.john@intel.com>
Reviewed-by: Raj Mojumder <raj.mojumder@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

1 files changed, 120 insertions, 0 deletions

diff --git a/chip/ish/system.c b/chip/ish/system.c
new file mode 100644
index 0000000000..75f1d5a4a8
--- /dev/null
+++ b/chip/ish/system.c
@@ -0,0 +1,120 @@
+/* Copyright (c) 2016 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* System module ISH (Not implemented) */
+
+#include "clock.h"
+#include "common.h"
+#include "console.h"
+#include "cpu.h"
+#include "gpio.h"
+#include "host_command.h"
+#include "registers.h"
+#include "shared_mem.h"
+#include "system.h"
+#include "hooks.h"
+#include "task.h"
+#include "timer.h"
+#include "util.h"
+#include "spi.h"
+
+/* Indices for hibernate data registers (RAM backed by VBAT) */
+enum hibdata_index {
+	HIBDATA_INDEX_SCRATCHPAD = 0,    /* General-purpose scratchpad */
+	HIBDATA_INDEX_SAVED_RESET_FLAGS  /* Saved reset flags */
+};
+
+int system_is_reboot_warm(void)
+{
+	return 0;
+}
+
+void system_pre_init(void)
+{
+}
+
+void chip_save_reset_flags(int flags)
+{
+}
+
+void _system_reset(int flags, int wake_from_hibernate)
+{
+}
+
+void system_reset(int flags)
+{
+	_system_reset(flags, 0);
+}
+
+const char *system_get_chip_vendor(void)
+{
+	return "intel";
+}
+
+const char *system_get_chip_name(void)
+{
+	return "intel";
+}
+
+static char to_hex(int x)
+{
+	if (x >= 0 && x <= 9)
+		return '0' + x;
+	return 'a' + x - 10;
+}
+
+const char *system_get_chip_revision(void)
+{
+	static char buf[3];
+	uint8_t rev = 0x86;
+
+	buf[0] = to_hex(rev / 16);
+	buf[1] = to_hex(rev & 0xf);
+	buf[2] = '\0';
+	return buf;
+}
+
+int system_get_vbnvcontext(uint8_t *block)
+{
+	return EC_ERROR_UNIMPLEMENTED;
+}
+
+int system_set_vbnvcontext(const uint8_t *block)
+{
+	return EC_ERROR_UNIMPLEMENTED;
+}
+
+int system_set_scratchpad(uint32_t value)
+{
+	return EC_SUCCESS;
+}
+
+uint32_t system_get_scratchpad(void)
+{
+	return 0;
+}
+
+void system_hibernate(uint32_t seconds, uint32_t microseconds)
+{
+}
+
+void htimer_interrupt(void)
+{
+	/* Time to wake up */
+}
+
+enum system_image_copy_t system_get_shrspi_image_copy(void)
+{
+	return 0;
+}
+
+uint32_t system_get_lfw_address(void)
+{
+	return 0;
+}
+
+void system_set_image_copy(enum system_image_copy_t copy)
+{
+}