diff options
| author | Leifu Zhao <leifu.zhao@intel.com> | 2020-02-14 10:20:52 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-02-27 00:29:03 +0000 |
| commit | e225427d2a04449d65fbae72932caa8270f182c7 (patch) | |
| tree | 3eda9062fb68d8d243aee5969a430cd84d8a57ae /chip/ish/uart.c | |
| parent | af07a29b0ab75abc03d6d6387257981bd10447b2 (diff) | |
| download | chrome-ec-e225427d2a04449d65fbae72932caa8270f182c7.tar.gz | |
ish: infrastructure changes to support ish5.4 PM
Infrastructure related changes to support enabling power management
for ish5.4 on tgl rvp platform.
BUG=b:149238813
BRANCH=none
TEST=ISH can successfully enter into D0i1/D0i2/D0i3 on tgl rvp.
Signed-off-by: Leifu Zhao <leifu.zhao@intel.com>
Change-Id: I50b6f1a4fe9c14f9479af2a2a438ec7395ec27a1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2056149
Reviewed-by: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Tested-by: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com>
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
Auto-Submit: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com>
Diffstat (limited to 'chip/ish/uart.c')
| -rw-r--r-- | chip/ish/uart.c | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/chip/ish/uart.c b/chip/ish/uart.c index 93df2c6504..d958dc94c5 100644 --- a/chip/ish/uart.c +++ b/chip/ish/uart.c @@ -205,6 +205,23 @@ static void uart_hw_init(enum UART_PORT id) IER(ctx->id) = IER_RECV; } +void uart_port_restore(void) +{ + uart_hw_init(ISH_DEBUG_UART); +} + +void uart_to_idle(void) +{ + int id; + + for (id = 0; id < UART_DEVICES; id++) { + LCR(id) = 0x80; + DLL(id) = 0x1; + DLH(id) = 0x0; + LCR(id) = 0x0; + } +} + static void uart_stop_hw(enum UART_PORT id) { int i; |