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| author | Dino Li <Dino.Li@ite.com.tw> | 2017-12-11 12:02:16 +0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2017-12-12 01:05:29 -0800 |
| commit | a7c08b257fff5420a584d0d8ac5529efcc111403 (patch) | |
| tree | 546556c2eab3e64550df7adbb4e24e6cde0c6eb6 /chip/it83xx/adc.c | |
| parent | 552ca1ec4982db07a42e6d974a9f12a50a4dbc1c (diff) | |
| download | chrome-ec-a7c08b257fff5420a584d0d8ac5529efcc111403.tar.gz | |
it83xx: adc: add support ADC13-16
IT8320 can support extra four ADC channels (ADC13-16).
BRANCH=none
BUG=none
TEST=Run console command 'adc' and check the results.
Change-Id: Ia9a259f54fa28d43dc0050c6e20885c0b3914f9c
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/808125
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Diffstat (limited to 'chip/it83xx/adc.c')
| -rw-r--r-- | chip/it83xx/adc.c | 36 |
1 files changed, 28 insertions, 8 deletions
diff --git a/chip/it83xx/adc.c b/chip/it83xx/adc.c index f91944b1a7..6b8361dbdb 100644 --- a/chip/it83xx/adc.c +++ b/chip/it83xx/adc.c @@ -40,11 +40,20 @@ const struct adc_ctrl_t adc_ctrl_regs[] = { &IT83XX_GPIO_GPCRI6}, {&IT83XX_ADC_VCH7CTL, &IT83XX_ADC_VCH7DATM, &IT83XX_ADC_VCH7DATL, &IT83XX_GPIO_GPCRI7}, + {&IT83XX_ADC_VCH13CTL, &IT83XX_ADC_VCH13DATM, &IT83XX_ADC_VCH13DATL, + &IT83XX_GPIO_GPCRL0}, + {&IT83XX_ADC_VCH14CTL, &IT83XX_ADC_VCH14DATM, &IT83XX_ADC_VCH14DATL, + &IT83XX_GPIO_GPCRL1}, + {&IT83XX_ADC_VCH15CTL, &IT83XX_ADC_VCH15DATM, &IT83XX_ADC_VCH15DATL, + &IT83XX_GPIO_GPCRL2}, + {&IT83XX_ADC_VCH16CTL, &IT83XX_ADC_VCH16DATM, &IT83XX_ADC_VCH16DATL, + &IT83XX_GPIO_GPCRL3}, }; +BUILD_ASSERT(ARRAY_SIZE(adc_ctrl_regs) == CHIP_ADC_COUNT); static void adc_enable_channel(int ch) { - if (ch < 4) + if (ch < CHIP_ADC_CH4) /* * for channel 0, 1, 2, and 3 * bit4 ~ bit0 : indicates voltage channel[x] @@ -55,8 +64,8 @@ static void adc_enable_channel(int ch) *adc_ctrl_regs[ch].adc_ctrl = 0xa0 + ch; else /* - * for channel 4, 5, 6, and 7 - * bit4 : voltage channel enable (ch 4~7 only) + * for channel 4 ~ 7 and 13 ~ 16. + * bit4 : voltage channel enable (ch 4~7 and 13 ~ 16) * bit5 : data valid interrupt of adc. * bit7 : W/C data valid flag */ @@ -71,7 +80,7 @@ static void adc_enable_channel(int ch) static void adc_disable_channel(int ch) { - if (ch < 4) + if (ch < CHIP_ADC_CH4) /* * for channel 0, 1, 2, and 3 * bit4 ~ bit0 : indicates voltage channel[x] @@ -81,8 +90,8 @@ static void adc_disable_channel(int ch) *adc_ctrl_regs[ch].adc_ctrl = 0x9F; else /* - * for channel 4, 5, 6, and 7 - * bit4 : voltage channel disable (ch 4~7 only) + * for channel 4 ~ 7 and 13 ~ 16. + * bit4 : voltage channel disable (ch 4~7 and 13 ~ 16) * bit7 : W/C data valid flag */ *adc_ctrl_regs[ch].adc_ctrl = 0x80; @@ -93,6 +102,13 @@ static void adc_disable_channel(int ch) task_disable_irq(IT83XX_IRQ_ADC); } +static int adc_data_valid(enum chip_adc_channel adc_ch) +{ + return (adc_ch <= CHIP_ADC_CH7) ? + (IT83XX_ADC_ADCDVSTS & (1 << adc_ch)) : + (IT83XX_ADC_ADCDVSTS2 & (1 << (adc_ch - CHIP_ADC_CH13))); +} + int adc_read_channel(enum adc_channel ch) { uint32_t events; @@ -115,13 +131,17 @@ int adc_read_channel(enum adc_channel ch) if (events & TASK_EVENT_ADC_DONE) { /* data valid of adc channel[x] */ - if (IT83XX_ADC_ADCDVSTS & (1 << adc_ch)) { + if (adc_data_valid(adc_ch)) { /* read adc raw data msb and lsb */ adc_raw_data = (*adc_ctrl_regs[adc_ch].adc_datm << 8) + *adc_ctrl_regs[adc_ch].adc_datl; /* W/C data valid flag */ - IT83XX_ADC_ADCDVSTS = (1 << adc_ch); + if (adc_ch <= CHIP_ADC_CH7) + IT83XX_ADC_ADCDVSTS = (1 << adc_ch); + else + IT83XX_ADC_ADCDVSTS2 = + (1 << (adc_ch - CHIP_ADC_CH13)); mv = adc_raw_data * adc_channels[ch].factor_mul / adc_channels[ch].factor_div + |