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| author | Dino Li <Dino.Li@ite.com.tw> | 2021-03-15 13:59:52 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-03-17 17:41:25 +0000 |
| commit | 1e34a69fd6064699decd529e9183dc964a89f599 (patch) | |
| tree | 8a18e093e52bde7f8c4fb885289d3d460c9cac7b /chip/it83xx/adc.c | |
| parent | 9a13fcc8405b803b60667e9cc633ae2ac30a0cd5 (diff) | |
| download | chrome-ec-1e34a69fd6064699decd529e9183dc964a89f599.tar.gz | |
it83xx/adc: Enable keeping ADC data buffer
IT83xx's ADC data is 10-bit and saving in two registers
(VCHxDATL/bit7-0 and VCHxDATM/bit9-8).
The CL enables the function of keeping ADC data buffer to prevent
reporting incorrect ADC raw data due to the following race condition:
1) adc data valided: 0 0xf8 (voltage is 3x248/1024=0.72v)
2) ec read VCHxDATM(0x0)
3) next adc conversion done: 0x1 0x08 (voltage is 3x264/1024=0.77v)
4) ec read VCHxDATL(0x8)
EC will return incorrect voltage (3x8/1024=0.02v) to caller for above
conditions.
BUG=b:175044329
BRANCH=none
TEST=No thermal shutdown on stress test.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Change-Id: I64d913a2b5d03ca51afcb31ffda6c6ee915338f6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2759449
Tested-by: rasheed.hsueh <rasheed.hsueh@lcfc.corp-partner.google.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Diffstat (limited to 'chip/it83xx/adc.c')
| -rw-r--r-- | chip/it83xx/adc.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/chip/it83xx/adc.c b/chip/it83xx/adc.c index 2dc82abab4..e4999fdae5 100644 --- a/chip/it83xx/adc.c +++ b/chip/it83xx/adc.c @@ -356,6 +356,11 @@ static void adc_init(void) IT83XX_ADC_ADCSTS &= ~BIT(7); IT83XX_ADC_ADCCFG &= ~BIT(5); IT83XX_ADC_ADCCTL = 1; + /* + * Enable this bit, and data of VCHxDATL/VCHxDATM will be + * kept until data valid is cleared. + */ + IT83XX_ADC_ADCGCR |= IT83XX_ADC_DBKEN; task_waiting = TASK_ID_INVALID; /* disable adc interrupt */ |