summaryrefslogtreecommitdiff
path: root/chip/it83xx/adc_chip.h
diff options
context:
space:
mode:
authorVadim Bendebury <vbendeb@chromium.org>2020-01-03 15:04:15 -0800
committerCommit Bot <commit-bot@chromium.org>2020-01-07 00:17:09 +0000
commit943645d993c88754b2db1e86734210256c505e07 (patch)
tree45ddf3e6cb66d1943b0e4eeb6cade057247f24c5 /chip/it83xx/adc_chip.h
parentc4e8fffe2024108ed4373f910a5b68291aa3802e (diff)
downloadchrome-ec-943645d993c88754b2db1e86734210256c505e07.tar.gz
drop unnecessary boards, chips and cts tests
The only board which would be built from this branch is Cr50. bds, fizz and host boards are necessary for proper make infrastructure operation and tests. lm4 and npcx are chips used by the bds and fizz boards, so they are also kept around. BRANCH=cr50, cr50-mp BUG=b:145912698 TEST='make buildall -j' succeeds Change-Id: I937b2b8642c1fe91578fc9615438ae22c165b20f Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1986942 Reviewed-by: Namyoon Woo <namyoon@chromium.org> Reviewed-by: Mary Ruthven <mruthven@chromium.org> Reviewed-by: Andrey Pronin <apronin@chromium.org>
Diffstat (limited to 'chip/it83xx/adc_chip.h')
-rw-r--r--chip/it83xx/adc_chip.h67
1 files changed, 0 insertions, 67 deletions
diff --git a/chip/it83xx/adc_chip.h b/chip/it83xx/adc_chip.h
deleted file mode 100644
index c43a64c132..0000000000
--- a/chip/it83xx/adc_chip.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/* Copyright 2014 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* IT83xx ADC module for Chrome EC */
-
-#ifndef __CROS_EC_ADC_CHIP_H
-#define __CROS_EC_ADC_CHIP_H
-
-#include "common.h"
-
-/*
- * Maximum time we allow for an ADC conversion.
- * NOTE:
- * This setting must be less than "SLEEP_SET_HTIMER_DELAY_USEC" in clock.c
- * or adding a sleep mask to prevent going in to deep sleep while ADC
- * converting.
- */
-#define ADC_TIMEOUT_US 248
-
-/* Minimum and maximum values returned by adc_read_channel(). */
-#define ADC_READ_MIN 0
-#define ADC_READ_MAX 1023
-#define ADC_MAX_MVOLT 3000
-
-/* List of ADC channels. */
-enum chip_adc_channel {
- CHIP_ADC_CH0 = 0,
- CHIP_ADC_CH1,
- CHIP_ADC_CH2,
- CHIP_ADC_CH3,
- CHIP_ADC_CH4,
- CHIP_ADC_CH5,
- CHIP_ADC_CH6,
- CHIP_ADC_CH7,
- CHIP_ADC_CH13,
- CHIP_ADC_CH14,
- CHIP_ADC_CH15,
- CHIP_ADC_CH16,
- CHIP_ADC_COUNT,
-};
-
-/* Data structure to define ADC channel control registers. */
-struct adc_ctrl_t {
- volatile uint8_t *adc_ctrl;
- volatile uint8_t *adc_datm;
- volatile uint8_t *adc_datl;
- volatile uint8_t *adc_pin_ctrl;
-};
-
-/* Data structure to define ADC channels. */
-struct adc_t {
- const char *name;
- int factor_mul;
- int factor_div;
- int shift;
- enum chip_adc_channel channel;
-};
-
-/*
- * Boards must provide this list of ADC channel definitions. This must match
- * the enum adc_channel list provided by the board.
- */
-extern const struct adc_t adc_channels[];
-
-#endif /* __CROS_EC_ADC_CHIP_H */