diff options
| author | Martin Roth <martinroth@chromium.org> | 2016-10-25 17:31:20 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2016-11-15 17:41:55 -0800 |
| commit | 651f8b9acd6a692fa21fa6e0891fffd240522d89 (patch) | |
| tree | 0dcfa8ffe5aff84a3fb6d9933ed433249d1711e8 /chip/it83xx/clock.c | |
| parent | 897ce78bddb26557a686ab9e756fcf3d6c121271 (diff) | |
| download | chrome-ec-651f8b9acd6a692fa21fa6e0891fffd240522d89.tar.gz | |
chip/g to chip/lm4: fix more misspellings in comments
No functional changes.
BUG=none
BRANCH=none
TEST=make buildall passes
Change-Id: I0c4fcc900ec0326d6904aa14f298206e62be0fda
Signed-off-by: Martin Roth <martinroth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/403418
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Diffstat (limited to 'chip/it83xx/clock.c')
| -rw-r--r-- | chip/it83xx/clock.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/chip/it83xx/clock.c b/chip/it83xx/clock.c index c353c7b326..b5638f2bbc 100644 --- a/chip/it83xx/clock.c +++ b/chip/it83xx/clock.c @@ -147,7 +147,7 @@ void __ram_code clock_pll_changed(void) IT83XX_ECPM_SCDCR0 = (2 << 4); /* JTAG and EC */ IT83XX_ECPM_SCDCR3 = (pll_div_jtag << 4) | pll_div_ec; - /* EC sleep after stanbdy instructioin */ + /* EC sleep after standby instruction */ clock_ec_pll_ctrl(EC_PLL_SLEEP); /* Global interrupt enable */ asm volatile ("setgie.e"); @@ -157,7 +157,7 @@ void __ram_code clock_pll_changed(void) asm volatile ("setgie.d"); /* New FND clock frequency */ IT83XX_ECPM_SCDCR0 = (pll_div_fnd << 4); - /* EC doze after stanbdy instructioin */ + /* EC doze after standby instruction */ clock_ec_pll_ctrl(EC_PLL_DOZE); } |