diff options
author | Dino Li <Dino.Li@ite.com.tw> | 2016-05-13 11:07:30 +0800 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2016-05-18 19:44:09 -0700 |
commit | f817140c3e38d00d6d967e56ca366e05e64dfdfc (patch) | |
tree | 5d3d08a97e3c8238cd79174666c5e6e62a19a89f /chip/it83xx/clock.c | |
parent | 6e0c60d11f704302f00f7b58a0a94695bb5dd85a (diff) | |
download | chrome-ec-f817140c3e38d00d6d967e56ca366e05e64dfdfc.tar.gz |
chip: it83xx: Optimize interrupt usage of LPC access
LPC access interrupt only enabled when EC entering deep doze mode. This
will reduce interrupt of LPC access. Also, this interrupt is always
enabled for LPC platform to support "CONFIG_LOW_POWER_S0".
Signed-off-by: Dino Li <dino.li@ite.com.tw>
BRANCH=none
BUG=none
TEST=Tested ectool command 'version' x 10000.
Change-Id: I9053c4018b38a8a852c3c6254e1fcde625f3fa3a
Reviewed-on: https://chromium-review.googlesource.com/336112
Commit-Ready: Dino Li <dino0303@gmail.com>
Tested-by: Dino Li <dino0303@gmail.com>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Diffstat (limited to 'chip/it83xx/clock.c')
-rw-r--r-- | chip/it83xx/clock.c | 20 |
1 files changed, 12 insertions, 8 deletions
diff --git a/chip/it83xx/clock.c b/chip/it83xx/clock.c index b24341b062..e5b701e0e0 100644 --- a/chip/it83xx/clock.c +++ b/chip/it83xx/clock.c @@ -96,8 +96,8 @@ void clock_init(void) clock_module_disable(); -#if defined(CONFIG_LPC) && defined(CONFIG_IT83XX_LPC_ACCESS_INT) - IT83XX_WUC_WUESR4 = 0xff; +#ifdef CONFIG_LPC + IT83XX_WUC_WUESR4 = (1 << 2); task_clear_pending_irq(IT83XX_IRQ_WKINTAD); /* bit2, wake-up enable for LPC access */ IT83XX_WUC_WUENR4 |= (1 << 2); @@ -229,6 +229,12 @@ void clock_sleep_mode_wakeup_isr(void) clock_event_timer_clock_change(EXT_PSR_8M_HZ, 0xffffffff); task_clear_pending_irq(et_ctrl_regs[EVENT_EXT_TIMER].irq); process_timers(0); +#ifdef CONFIG_LPC + /* disable lpc access wui */ + task_disable_irq(IT83XX_IRQ_WKINTAD); + IT83XX_WUC_WUESR4 = (1 << 2); + task_clear_pending_irq(IT83XX_IRQ_WKINTAD); +#endif /* disable uart wui */ uart_exit_dsleep(); /* Record time spent in sleep. */ @@ -258,14 +264,15 @@ void __idle(void) if (DEEP_SLEEP_ALLOWED) allow_sleep = clock_allow_low_power_idle(); -#if defined(CONFIG_LPC) && defined(CONFIG_IT83XX_LPC_ACCESS_INT) - task_enable_irq(IT83XX_IRQ_WKINTAD); -#endif if (allow_sleep) { interrupt_disable(); /* reset low power mode hw timer */ IT83XX_ETWD_ETXCTRL(LOW_POWER_EXT_TIMER) |= (1 << 1); sleep_mode_t0 = get_time(); +#ifdef CONFIG_LPC + /* enable lpc access wui */ + task_enable_irq(IT83XX_IRQ_WKINTAD); +#endif /* enable uart wui */ uart_enter_dsleep(); /* enable hw timer for deep doze / sleep mode wake-up */ @@ -283,9 +290,6 @@ void __idle(void) asm("standby wake_grant"); idle_doze_cnt++; } -#if defined(CONFIG_LPC) && defined(CONFIG_IT83XX_LPC_ACCESS_INT) - task_disable_irq(IT83XX_IRQ_WKINTAD); -#endif } } #endif /* CONFIG_LOW_POWER_IDLE */ |