diff options
| author | Jett Rink <jettrink@chromium.org> | 2018-05-21 10:22:55 -0600 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2018-05-22 21:56:39 -0700 |
| commit | df06639b1d4fd2798e577f9aead6bc4495d5f3b5 (patch) | |
| tree | 060bf073cf3e24c75ffb78aa62855cc28c089c42 /chip/it83xx/clock.c | |
| parent | fddf4e703d8673b8ea62f81c8aba3943cfeffea5 (diff) | |
| download | chrome-ec-df06639b1d4fd2798e577f9aead6bc4495d5f3b5.tar.gz | |
lpc/espi: convert ec chip code to use granular option
Break the ec chip code up with the more granular
CONFIG_HOSTCMD_(X86|LPC|ESPI) options.
BRANCH=none
BUG=chromium:818804
TEST=Full stack builds and works on yorp (espi) and grunt (lpc)
Change-Id: Ie272787b2425175fe36b06fcdeeee90ec5ccbe95
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1067502
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Diffstat (limited to 'chip/it83xx/clock.c')
| -rw-r--r-- | chip/it83xx/clock.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/chip/it83xx/clock.c b/chip/it83xx/clock.c index 3be8c989da..a5c2840367 100644 --- a/chip/it83xx/clock.c +++ b/chip/it83xx/clock.c @@ -193,7 +193,7 @@ static void clock_set_pll(enum pll_freq_idx idx) ext_timer_ms(LOW_POWER_EXT_TIMER, EXT_PSR_32P768K_HZ, 1, 1, 5, 1, 0); task_clear_pending_irq(et_ctrl_regs[LOW_POWER_EXT_TIMER].irq); -#ifdef CONFIG_ESPI +#ifdef CONFIG_HOSTCMD_ESPI /* * Workaround for (b:70537592): * We have to set chip select pin as input mode in order to @@ -203,7 +203,7 @@ static void clock_set_pll(enum pll_freq_idx idx) #endif /* Update PLL settings. */ clock_pll_changed(); -#ifdef CONFIG_ESPI +#ifdef CONFIG_HOSTCMD_ESPI /* (b:70537592) Change back to ESPI CS# function. */ IT83XX_GPIO_GPCRM5 &= ~0xc0; #endif @@ -259,7 +259,7 @@ void clock_init(void) clock_module_disable(); -#ifdef CONFIG_LPC +#ifdef CONFIG_HOSTCMD_X86 IT83XX_WUC_WUESR4 = (1 << 2); task_clear_pending_irq(IT83XX_IRQ_WKINTAD); /* bit2, wake-up enable for LPC access */ @@ -450,7 +450,7 @@ void clock_sleep_mode_wakeup_isr(void) clock_event_timer_clock_change(EXT_PSR_8M_HZ, 0xffffffff); task_clear_pending_irq(et_ctrl_regs[EVENT_EXT_TIMER].irq); process_timers(0); -#ifdef CONFIG_LPC +#ifdef CONFIG_HOSTCMD_X86 /* disable lpc access wui */ task_disable_irq(IT83XX_IRQ_WKINTAD); IT83XX_WUC_WUESR4 = (1 << 2); @@ -490,7 +490,7 @@ void __idle(void) /* reset low power mode hw timer */ IT83XX_ETWD_ETXCTRL(LOW_POWER_EXT_TIMER) |= (1 << 1); sleep_mode_t0 = get_time(); -#ifdef CONFIG_LPC +#ifdef CONFIG_HOSTCMD_X86 /* enable lpc access wui */ task_enable_irq(IT83XX_IRQ_WKINTAD); #endif |