diff options
author | Dino Li <Dino.Li@ite.com.tw> | 2016-09-02 11:52:38 +0800 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2016-09-02 21:17:19 -0700 |
commit | edb727f8a39bda863b0649776b2fdc3f462ec65e (patch) | |
tree | 808ee04991838efdded33bb798901760fdbf9c9d /chip/it83xx/clock.c | |
parent | c8548f64058491a33a834328e3c97fdb9d1bf754 (diff) | |
download | chrome-ec-edb727f8a39bda863b0649776b2fdc3f462ec65e.tar.gz |
it83xx: fix observation register latch issue for event timer
Adding fix of event timer for CL:358730.
Signed-off-by: Dino Li <dino.li@ite.com.tw>
BRANCH=none
BUG=chrome-os-partner:55044
TEST=We simulate the delay time between first and second read,
and prove this method can avoid latch fail.
Change-Id: I82cd4ce470ffc9a8262d9303e3fd390812c89cac
Reviewed-on: https://chromium-review.googlesource.com/380349
Commit-Ready: Dino Li <Dino.Li@ite.com.tw>
Tested-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Diffstat (limited to 'chip/it83xx/clock.c')
-rw-r--r-- | chip/it83xx/clock.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/chip/it83xx/clock.c b/chip/it83xx/clock.c index 60549c81fe..ab542aae6e 100644 --- a/chip/it83xx/clock.c +++ b/chip/it83xx/clock.c @@ -310,7 +310,12 @@ static void clock_htimer_enable(void) uint32_t c; /* change event timer clock source to 32.768 KHz */ +#if 0 c = TIMER_CNT_8M_32P768K(IT83XX_ETWD_ETXCNTOR(EVENT_EXT_TIMER)); +#else + /* TODO(crosbug.com/p/55044) */ + c = TIMER_CNT_8M_32P768K(ext_observation_reg_read(EVENT_EXT_TIMER)); +#endif clock_event_timer_clock_change(EXT_PSR_32P768K_HZ, c); } @@ -323,7 +328,12 @@ static int clock_allow_low_power_idle(void) et_ctrl_regs[EVENT_EXT_TIMER].mask) return 0; +#if 0 if (EVENT_TIMER_COUNT_TO_US(IT83XX_ETWD_ETXCNTOR(EVENT_EXT_TIMER)) < +#else + /* TODO(crosbug.com/p/55044) */ + if (EVENT_TIMER_COUNT_TO_US(ext_observation_reg_read(EVENT_EXT_TIMER)) < +#endif SLEEP_SET_HTIMER_DELAY_USEC) return 0; |