it83xx: IT8320 DX version compatibility

[espi]:
  The supported maximum frequency of slave is adjustable and we
  set it at 66MHz at initialization (the same as Bx version).
[gpio]:
  All GPIOs support interrupt on rising, falling, and either edge.
  More GPIOs support 1.8v input.
[irq]:
  Enable newly added interrupts.
[registers]:
  Remove unused declaration.
[system]:
  Watchdog reset supports resetting the full EC domain function
  (include write protect setting).

BUG=none
BRANCH=none
TEST=[espi]:
      Ensure the eSPI frequency is able to work at 50 MHz on small
      core CPU.
     [gpio]:
      The settings of input voltage 1.8v selection and both edge interrupt
      registers are matched to the declarations of GPIO signal in gpio.inc.
     [system]:
      The console command "reboot hard" is able to unprotected the flash.
      (testing failed)

Change-Id: I053d8a59a9e90d28e2f2c9b79675ea84425f4959
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/1113166
Reviewed-by: Jett Rink <jettrink@chromium.org>

1 files changed, 11 insertions, 0 deletions

diff --git a/chip/it83xx/espi.c b/chip/it83xx/espi.c
index 5f6d48f6b1..c31326f386 100644
--- a/chip/it83xx/espi.c
+++ b/chip/it83xx/espi.c
@@ -528,6 +528,17 @@ void espi_interrupt(void)
 
 void espi_init(void)
 {
+	/*
+	 * bit[2-0], the maximum frequency of operation supported by slave:
+	 * 000b: 20MHz
+	 * 001b: 25MHz
+	 * 010b: 33MHz
+	 * 011b: 50MHz
+	 * 100b: 66MHz
+	 */
+#ifdef IT83XX_ESPI_SLAVE_MAX_FREQ_CONFIGURABLE
+	IT83XX_ESPI_GCAC1 = (IT83XX_ESPI_GCAC1 & ~0x7) | (1 << 2);
+#endif
 	/* reset vw_index_flag at initialization */
 	espi_reset_vw_index_flags();