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| author | Yuval Peress <peress@chromium.org> | 2021-01-14 01:29:08 -0700 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-01-15 04:07:55 +0000 |
| commit | 9e422c3c05fdd324565049b09be27c446f9dc0ca (patch) | |
| tree | b4694ca5abc8c1be1000a1efe7a7bd8a02ddd856 /chip/it83xx/flash.c | |
| parent | 6aa3d78608b681e6374f30747a7f6ab80938bde6 (diff) | |
| download | chrome-ec-9e422c3c05fdd324565049b09be27c446f9dc0ca.tar.gz | |
Refactor CONFIG_FLASH_SIZE to CONFIG_FLASH_SIZE_BYTES
In Zephyr CONFIG_FLASH_SIZE is a Kconfig value that is used
throughout. The issue is that the units don't match. In
Zephyr the value is in KiB instead of bytes. This refactor
simply renames CONFIG_FLASH_SIZE in platform/ec to include
the unit (via _BYTES).
BRANCH=none
BUG=b:174873770
TEST=make buildall
be generated by the build instead of per board
Signed-off-by: Yuval Peress <peress@chromium.org>
Change-Id: I44bf3c7a20fcf62aaa9ae15715be78db4210f384
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2627638
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
Diffstat (limited to 'chip/it83xx/flash.c')
| -rw-r--r-- | chip/it83xx/flash.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/chip/it83xx/flash.c b/chip/it83xx/flash.c index c0f46552fd..aa1e280159 100644 --- a/chip/it83xx/flash.c +++ b/chip/it83xx/flash.c @@ -48,7 +48,7 @@ /* Read status register */ #define FLASH_CMD_RS 0x05 -#if (CONFIG_FLASH_SIZE == 0x80000) && defined(CHIP_CORE_NDS32) +#if (CONFIG_FLASH_SIZE_BYTES == 0x80000) && defined(CHIP_CORE_NDS32) #define FLASH_TEXT_START ((uint32_t) &__flash_text_start) /* Apply workaround of the issue (b:111808417) */ #define IMMU_CACHE_TAG_INVALID @@ -370,7 +370,7 @@ static enum flash_wp_status flash_check_wp(void) enum flash_wp_status wp_status; int all_bank_count, bank; - all_bank_count = CONFIG_FLASH_SIZE / CONFIG_FLASH_BANK_SIZE; + all_bank_count = CONFIG_FLASH_SIZE_BYTES / CONFIG_FLASH_BANK_SIZE; for (bank = 0; bank < all_bank_count; bank++) { if (!(IT83XX_GCTRL_EWPR0PFEC(FWP_REG(bank)) & FWP_MASK(bank))) @@ -555,7 +555,7 @@ int flash_physical_protect_now(int all) if (all) { /* Protect the entire flash */ flash_protect_banks(0, - CONFIG_FLASH_SIZE / CONFIG_FLASH_BANK_SIZE, + CONFIG_FLASH_SIZE_BYTES / CONFIG_FLASH_BANK_SIZE, FLASH_WP_EC); all_protected = 1; } else { @@ -756,11 +756,11 @@ int flash_pre_init(void) if (prot_flags & EC_FLASH_PROTECT_GPIO_ASSERTED) { /* Protect the entire flash of host interface */ flash_protect_banks(0, - CONFIG_FLASH_SIZE / CONFIG_FLASH_BANK_SIZE, + CONFIG_FLASH_SIZE_BYTES / CONFIG_FLASH_BANK_SIZE, FLASH_WP_HOST); /* Protect the entire flash of DBGR interface */ flash_protect_banks(0, - CONFIG_FLASH_SIZE / CONFIG_FLASH_BANK_SIZE, + CONFIG_FLASH_SIZE_BYTES / CONFIG_FLASH_BANK_SIZE, FLASH_WP_DBGR); /* * Write protect is asserted. If we want RO flash protected, |