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authorVadim Bendebury <vbendeb@chromium.org>2017-11-27 15:59:08 -0800
committerchrome-bot <chrome-bot@chromium.org>2017-11-30 07:09:46 -0800
commit72162f73bfcc9a63445126df83794e5e298f2810 (patch)
tree8d98cd78c3816432de8f18d75ccd493e3f350ac7 /chip/it83xx/flash.c
parent9ef9db911c6b86e1c07a5ac57cb1a23173774d83 (diff)
downloadchrome-ec-72162f73bfcc9a63445126df83794e5e298f2810.tar.gz
g:sps: do not stall reset when CS is asserted
Stalling reset during when CS is asserted is useful to start with, it was added before out of abundance of caution, but come to think of it, should the reset happen asynchronously driven be the EC, the AP would be reset too. And when AP is reset on its own accord, it would not be transmitting anything on the SPI interface. On top of that it turns out that in some cases reset on ARM platforms is accompanied by the CS line driven low, which causes infinite loop if Cr50 is waiting for CS to deassert before proceeding. BRANCH=cr50 BUG=b:67008109 TEST=verified that RMA reset operates properly on both ARM and x86 platforms. Change-Id: I43efd0cefa5d6eb543dfd27e3c9fb3b4bf1a8ea6 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/791818 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Andrey Pronin <apronin@chromium.org>
Diffstat (limited to 'chip/it83xx/flash.c')
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