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| author | tim <tim2.lin@ite.corp-partner.google.com> | 2019-03-28 14:08:15 +0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2019-03-30 20:59:39 -0700 |
| commit | 6a7c59affa6aba2af814a45f6f49908d22e2fa04 (patch) | |
| tree | 92e5c77dda843e1e1eae9eabafdb2650d23870fa /chip/it83xx/i2c.c | |
| parent | 101ef9c869d483307eb9325ec82a97f606e9caca (diff) | |
| download | chrome-ec-6a7c59affa6aba2af814a45f6f49908d22e2fa04.tar.gz | |
it83xx/i2cs: add i2c slave function
The I2C function of IT8320 is used as the slave.
The slave channel A can support 16-byte FIFO for
read and write data. The enhanced I2C channel D,
E and F can support read and write 256-byte data
by DMA mode.
When master transmits data to slave, the interrupt
signal will generate, and the data will be saved
to buffer.
BUG=none
BRANCH=none
TEST=none
Change-Id: I167215352119ec11dfd96eb1f33abc1e2111dead
Signed-off-by: tim <tim2.lin@ite.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/1488273
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Tim2 Lin <tim2.lin@ite.corp-partner.google.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Diffstat (limited to 'chip/it83xx/i2c.c')
| -rw-r--r-- | chip/it83xx/i2c.c | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/chip/it83xx/i2c.c b/chip/it83xx/i2c.c index 56f805b9f6..48d13d5fdd 100644 --- a/chip/it83xx/i2c.c +++ b/chip/it83xx/i2c.c @@ -18,12 +18,6 @@ #define CPRINTS(format, args...) cprints(CC_I2C, format, ## args) -/* - * The count number of the counter for 25 ms register. - * The 25 ms register is calculated by (count number *1.024 kHz). - */ -#define I2C_CLK_LOW_TIMEOUT 255 /* ~=249 ms */ - /* Default maximum time we allow for an I2C transfer */ #define I2C_TIMEOUT_DEFAULT_US (100 * MSEC) |