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authortim <tim2.lin@ite.corp-partner.google.com>2019-03-28 14:08:15 +0800
committerchrome-bot <chrome-bot@chromium.org>2019-03-30 20:59:39 -0700
commit6a7c59affa6aba2af814a45f6f49908d22e2fa04 (patch)
tree92e5c77dda843e1e1eae9eabafdb2650d23870fa /chip/it83xx/intc.c
parent101ef9c869d483307eb9325ec82a97f606e9caca (diff)
downloadchrome-ec-6a7c59affa6aba2af814a45f6f49908d22e2fa04.tar.gz
it83xx/i2cs: add i2c slave function
The I2C function of IT8320 is used as the slave. The slave channel A can support 16-byte FIFO for read and write data. The enhanced I2C channel D, E and F can support read and write 256-byte data by DMA mode. When master transmits data to slave, the interrupt signal will generate, and the data will be saved to buffer. BUG=none BRANCH=none TEST=none Change-Id: I167215352119ec11dfd96eb1f33abc1e2111dead Signed-off-by: tim <tim2.lin@ite.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1488273 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Tim2 Lin <tim2.lin@ite.corp-partner.google.com> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Diffstat (limited to 'chip/it83xx/intc.c')
-rw-r--r--chip/it83xx/intc.c30
1 files changed, 25 insertions, 5 deletions
diff --git a/chip/it83xx/intc.c b/chip/it83xx/intc.c
index 79d738e93c..033a65d87b 100644
--- a/chip/it83xx/intc.c
+++ b/chip/it83xx/intc.c
@@ -219,9 +219,14 @@ void intc_cpu_int_group_6(void)
int intc_group_6 = intc_get_ec_int();
switch (intc_group_6) {
-#ifdef CONFIG_I2C
+#if defined(CONFIG_I2C_MASTER) || defined(CONFIG_I2C_SLAVE)
case IT83XX_IRQ_SMB_A:
- i2c_interrupt(IT83XX_I2C_CH_A);
+#ifdef CONFIG_I2C_SLAVE
+ if (IT83XX_SMB_SFFCTL & IT83XX_SMB_SAFE)
+ i2c_slv_interrupt(IT83XX_I2C_CH_A);
+ else
+#endif
+ i2c_interrupt(IT83XX_I2C_CH_A);
break;
case IT83XX_IRQ_SMB_B:
@@ -233,15 +238,30 @@ void intc_cpu_int_group_6(void)
break;
case IT83XX_IRQ_SMB_D:
- i2c_interrupt(IT83XX_I2C_CH_D);
+#ifdef CONFIG_I2C_SLAVE
+ if (!(IT83XX_I2C_CTR(3) & IT83XX_I2C_MODE))
+ i2c_slv_interrupt(IT83XX_I2C_CH_D);
+ else
+#endif
+ i2c_interrupt(IT83XX_I2C_CH_D);
break;
case IT83XX_IRQ_SMB_E:
- i2c_interrupt(IT83XX_I2C_CH_E);
+#ifdef CONFIG_I2C_SLAVE
+ if (!(IT83XX_I2C_CTR(0) & IT83XX_I2C_MODE))
+ i2c_slv_interrupt(IT83XX_I2C_CH_E);
+ else
+#endif
+ i2c_interrupt(IT83XX_I2C_CH_E);
break;
case IT83XX_IRQ_SMB_F:
- i2c_interrupt(IT83XX_I2C_CH_F);
+#ifdef CONFIG_I2C_SLAVE
+ if (!(IT83XX_I2C_CTR(1) & IT83XX_I2C_MODE))
+ i2c_slv_interrupt(IT83XX_I2C_CH_F);
+ else
+#endif
+ i2c_interrupt(IT83XX_I2C_CH_F);
break;
#endif
default: