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| author | Tzung-Bi Shih <tzungbi@chromium.org> | 2020-03-23 12:12:28 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-05-19 08:55:33 +0000 |
| commit | 57be4e6b00489ce571e8caf7f36b30d1a5f8c700 (patch) | |
| tree | 8efd64388484a59c47afdfb08da78e33211ef8b7 /chip/it83xx/irq.c | |
| parent | cb352aa0d6986828bafb2c1b530ed6c93e6f2089 (diff) | |
| download | chrome-ec-57be4e6b00489ce571e8caf7f36b30d1a5f8c700.tar.gz | |
core/riscv-rv32i: move interrupt details to IT83XX specific
Getting source interrupt number is chip specific. Moves the details to
chip implementation.
BRANCH=none
BUG=b:151897847
TEST=1. make BOARD=asurada
2. flash_ec --board=asurada --image build/asurada/ec.bin
3. (EC console)> version
Signed-off-by: Tzung-Bi Shih <tzungbi@chromium.org>
Change-Id: Ia72acf8ec9c09cb329f8d7c92d22476512ffa669
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2114951
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
Diffstat (limited to 'chip/it83xx/irq.c')
| -rw-r--r-- | chip/it83xx/irq.c | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/chip/it83xx/irq.c b/chip/it83xx/irq.c index 498b7446f0..e116200a00 100644 --- a/chip/it83xx/irq.c +++ b/chip/it83xx/irq.c @@ -59,6 +59,37 @@ static const struct { IRQ_GROUP(28, { 2, 2, 2, 2, 2, 2, -1, -1}), }; +#if defined(CHIP_FAMILY_IT8320) /* N8 core */ +/* Number of CPU hardware interrupts (HW0 ~ HW15) */ +int cpu_int_entry_number; +#endif + +int chip_get_ec_int(void) +{ + extern volatile int ec_int; + +#if defined(CHIP_FAMILY_IT8320) /* N8 core */ + int i; + + for (i = 0; i < IT83XX_IRQ_COUNT; i++) { + ec_int = IT83XX_INTC_IVCT(cpu_int_entry_number); + /* + * WORKAROUND: when the interrupt vector register isn't + * latched in a load operation, + * we read it again to make sure the value we got + * is the correct value. + */ + if (ec_int == IT83XX_INTC_IVCT(cpu_int_entry_number)) + break; + } + /* Determine interrupt number */ + ec_int -= 16; +#else /* defined(CHIP_FAMILY_IT8XXX2) RISCV core */ + ec_int = IT83XX_INTC_AIVCT - 0x10; +#endif + return ec_int; +} + int chip_get_intc_group(int irq) { return irq_groups[irq / 8].cpu_int[irq % 8]; |