diff options
| author | Ruibin Chang <ruibin.chang@ite.com.tw> | 2020-06-03 14:08:42 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-10-14 06:10:48 +0000 |
| commit | a57076ce03b3aa43d5cf62371649a7e9a28667e2 (patch) | |
| tree | 3de7bcd25f17068b0b58fa0667f188a5a806542f /chip/it83xx/keyboard_raw.c | |
| parent | 11053f40043229b98ab7cb6be0325ab483a5d9e5 (diff) | |
| download | chrome-ec-a57076ce03b3aa43d5cf62371649a7e9a28667e2.tar.gz | |
it83xx/KB/GPIO: support keyboard GPIO output mode
These pins could be used as GPIO input, and they can
be configured as GPIO output as well. So we made this
patch to support it.
BRANCH=none
BUG=b:170699805
TEST=On board it8xxx2_evb
1.GPIO only: set/get level properly at GPIO mode.
2.GPIO and alternate mix: KSI input low and KSO GPIO level
not change
On board reef_it8320
1.keyboard scan function still work fine.
Change-Id: I2098812649f2e3ee9a8718d0d75e541ce3f14338
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2182128
Tested-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Diffstat (limited to 'chip/it83xx/keyboard_raw.c')
| -rw-r--r-- | chip/it83xx/keyboard_raw.c | 32 |
1 files changed, 29 insertions, 3 deletions
diff --git a/chip/it83xx/keyboard_raw.c b/chip/it83xx/keyboard_raw.c index 5f44670576..25f2b49c00 100644 --- a/chip/it83xx/keyboard_raw.c +++ b/chip/it83xx/keyboard_raw.c @@ -10,11 +10,15 @@ #include "task.h" #include "irq_chip.h" +#define KSOH_PIN_MASK (((1 << (KEYBOARD_COLS_MAX - 8)) - 1) & 0xff) + /* * Initialize the raw keyboard interface. */ void keyboard_raw_init(void) { + uint32_t int_mask; + /* Ensure top-level interrupt is disabled */ keyboard_raw_enable_interrupt(0); @@ -40,8 +44,17 @@ void keyboard_raw_init(void) IT83XX_KBS_KSOL = 0x00; #endif - /* KSO[15:8] pins low. */ - IT83XX_KBS_KSOH1 = 0x00; + /* critical section with interrupts off */ + int_mask = read_clear_int_mask(); + /* + * KSO[COLS_MAX:8] pins low. + * NOTE: KSO[15:8] pins can part be enabled for keyboard function and + * rest be configured as GPIO output mode. In this case that we + * disable the ISR in critical section to avoid race condition. + */ + IT83XX_KBS_KSOH1 &= ~KSOH_PIN_MASK; + /* restore interrupts */ + set_int_mask(int_mask); /* KSI[0-7] falling-edge triggered is selected */ IT83XX_WUC_WUEMR3 = 0xFF; @@ -71,6 +84,7 @@ void keyboard_raw_task_start(void) test_mockable void keyboard_raw_drive_column(int col) { int mask; + uint32_t int_mask; /* Tri-state all outputs */ if (col == KEYBOARD_COLUMN_NONE) @@ -87,7 +101,19 @@ test_mockable void keyboard_raw_drive_column(int col) mask ^= BIT(2); #endif IT83XX_KBS_KSOL = mask & 0xff; - IT83XX_KBS_KSOH1 = (mask >> 8) & 0xff; + + /* critical section with interrupts off */ + int_mask = read_clear_int_mask(); + /* + * Because IT83XX_KBS_KSOH1 register is shared by keyboard scan + * out and GPIO output mode, so we don't drive all KSOH pins + * here (this depends on how many keyboard matrix output pin + * we are using). + */ + IT83XX_KBS_KSOH1 = (IT83XX_KBS_KSOH1 & ~KSOH_PIN_MASK) | + ((mask >> 8) & KSOH_PIN_MASK); + /* restore interrupts */ + set_int_mask(int_mask); } /* |