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authorDino Li <Dino.Li@ite.com.tw>2019-12-20 13:18:21 +0800
committerCommit Bot <commit-bot@chromium.org>2019-12-23 03:03:22 +0000
commite3f009f7773cc40f86b01326fe451e797b3f5080 (patch)
treecfea22a2521bf09e56cf4212cf9a2f9249c2d8e5 /chip/it83xx/registers.h
parentb462358fe122b51cdad99740329e6034c35bf4a0 (diff)
downloadchrome-ec-e3f009f7773cc40f86b01326fe451e797b3f5080.tar.gz
chip/it8xxx2: Don't let internal flash go into deep power down mode
We got an issue on IT83202BX that flash won't be able to wake up correctly in EC low power mode when WRST# is asserted. This issue might cause cold reset failure so we made this change to fix it. BUG=none BRANCH=none TEST=hibernate EC and then press servo board's COLD_RST_L to reset EC. EC reboots. Change-Id: Ide3a240e1fe62d712536c69d8f390241e67144f6 Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1973974 Reviewed-by: Jett Rink <jettrink@chromium.org>
Diffstat (limited to 'chip/it83xx/registers.h')
-rw-r--r--chip/it83xx/registers.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/chip/it83xx/registers.h b/chip/it83xx/registers.h
index aeab504147..a6373ddc20 100644
--- a/chip/it83xx/registers.h
+++ b/chip/it83xx/registers.h
@@ -1205,6 +1205,8 @@ REG8(IT83XX_PMC_BASE + (ch > LPC_PM2 ? 5 : 8) + (ch << 4))
/* Shared Memory Flash Interface Bridge (SMFI) */
#define IT83XX_SMFI_BASE 0x00F01000
+#define IT83XX_SMFI_SMECCS REG8(IT83XX_SMFI_BASE+0x20)
+#define IT83XX_SMFI_MASK_HOSTWA BIT(5)
#define IT83XX_SMFI_HRAMWC REG8(IT83XX_SMFI_BASE+0x5A)
#define IT83XX_SMFI_HRAMW0BA REG8(IT83XX_SMFI_BASE+0x5B)
#define IT83XX_SMFI_HRAMW1BA REG8(IT83XX_SMFI_BASE+0x5C)