diff options
| author | Dino Li <Dino.Li@ite.com.tw> | 2017-12-11 12:02:16 +0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2017-12-12 01:05:29 -0800 |
| commit | a7c08b257fff5420a584d0d8ac5529efcc111403 (patch) | |
| tree | 546556c2eab3e64550df7adbb4e24e6cde0c6eb6 /chip/it83xx/registers.h | |
| parent | 552ca1ec4982db07a42e6d974a9f12a50a4dbc1c (diff) | |
| download | chrome-ec-a7c08b257fff5420a584d0d8ac5529efcc111403.tar.gz | |
it83xx: adc: add support ADC13-16
IT8320 can support extra four ADC channels (ADC13-16).
BRANCH=none
BUG=none
TEST=Run console command 'adc' and check the results.
Change-Id: Ia9a259f54fa28d43dc0050c6e20885c0b3914f9c
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/808125
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Diffstat (limited to 'chip/it83xx/registers.h')
| -rw-r--r-- | chip/it83xx/registers.h | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/chip/it83xx/registers.h b/chip/it83xx/registers.h index 93417e08b9..3b3401f615 100644 --- a/chip/it83xx/registers.h +++ b/chip/it83xx/registers.h @@ -620,6 +620,11 @@ #define IT83XX_GPIO_GPDMRF REG8(IT83XX_GPIO_BASE+0x66) #define IT83XX_GPIO_GPDMRH REG8(IT83XX_GPIO_BASE+0x68) +#define IT83XX_GPIO_GPCRL0 REG8(IT83XX_GPIO_BASE+0x98) +#define IT83XX_GPIO_GPCRL1 REG8(IT83XX_GPIO_BASE+0x99) +#define IT83XX_GPIO_GPCRL2 REG8(IT83XX_GPIO_BASE+0x9A) +#define IT83XX_GPIO_GPCRL3 REG8(IT83XX_GPIO_BASE+0x9B) + #define IT83XX_GPIO_GRC1 REG8(IT83XX_GPIO_BASE+0xF0) #define IT83XX_GPIO_GRC2 REG8(IT83XX_GPIO_BASE+0xF1) #define IT83XX_GPIO_GRC3 REG8(IT83XX_GPIO_BASE+0xF2) @@ -867,6 +872,19 @@ enum clock_gate_offsets { #define IT83XX_ADC_VCMP2CTL REG8(IT83XX_ADC_BASE+0x4C) #define IT83XX_ADC_CMP2THRDATM REG8(IT83XX_ADC_BASE+0x4D) #define IT83XX_ADC_CMP2THRDATL REG8(IT83XX_ADC_BASE+0x4E) +#define IT83XX_ADC_VCH13CTL REG8(IT83XX_ADC_BASE+0x60) +#define IT83XX_ADC_VCH13DATM REG8(IT83XX_ADC_BASE+0x61) +#define IT83XX_ADC_VCH13DATL REG8(IT83XX_ADC_BASE+0x62) +#define IT83XX_ADC_VCH14CTL REG8(IT83XX_ADC_BASE+0x63) +#define IT83XX_ADC_VCH14DATM REG8(IT83XX_ADC_BASE+0x64) +#define IT83XX_ADC_VCH14DATL REG8(IT83XX_ADC_BASE+0x65) +#define IT83XX_ADC_VCH15CTL REG8(IT83XX_ADC_BASE+0x66) +#define IT83XX_ADC_VCH15DATM REG8(IT83XX_ADC_BASE+0x67) +#define IT83XX_ADC_VCH15DATL REG8(IT83XX_ADC_BASE+0x68) +#define IT83XX_ADC_VCH16CTL REG8(IT83XX_ADC_BASE+0x69) +#define IT83XX_ADC_VCH16DATM REG8(IT83XX_ADC_BASE+0x6A) +#define IT83XX_ADC_VCH16DATL REG8(IT83XX_ADC_BASE+0x6B) +#define IT83XX_ADC_ADCDVSTS2 REG8(IT83XX_ADC_BASE+0x6C) /* Keyboard Controller (KBC) */ #define IT83XX_KBC_BASE 0x00F01300 |