diff options
| author | Dino Li <dino.li@ite.com.tw> | 2015-06-29 17:48:54 +0800 |
|---|---|---|
| committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2015-06-30 17:18:54 +0000 |
| commit | e881d99fde5bc818b72bea91ce8cd1daa70bc760 (patch) | |
| tree | 47a3c44e7c40e01e0150e1af0eaf295932eab569 /chip/it83xx/registers.h | |
| parent | 362174b49b50fcd5d8a2542662e576b7e69321a1 (diff) | |
| download | chrome-ec-e881d99fde5bc818b72bea91ce8cd1daa70bc760.tar.gz | |
it8380dev: add pin 3.3v/1.8v selection
add GPIO_SEL_1P8V flag for 1.8v/3.3v selection.
Signed-off-by: Dino Li <dino.li@ite.com.tw>
BRANCH=none
BUG=none
TEST=1. To configure 1.8V/3.3V pin to 1.8V,
set GPIO_SEL_1P8V flag in gpio.inc.
2. The corresponding bit will be set as default value if the pin
is not listed in gpio.inc.
Change-Id: Ica02aabe40b83fcb4d33bd28d717a0633bdef5f3
Reviewed-on: https://chromium-review.googlesource.com/281842
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Dino Li <dino.li@ite.com.tw>
Tested-by: Dino Li <dino.li@ite.com.tw>
Diffstat (limited to 'chip/it83xx/registers.h')
| -rw-r--r-- | chip/it83xx/registers.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/chip/it83xx/registers.h b/chip/it83xx/registers.h index 47113ecd12..c918d3eb5b 100644 --- a/chip/it83xx/registers.h +++ b/chip/it83xx/registers.h @@ -531,6 +531,12 @@ #define IT83XX_GPIO_GRC6 REG8(IT83XX_GPIO_BASE+0xF5) #define IT83XX_GPIO_GRC7 REG8(IT83XX_GPIO_BASE+0xF6) #define IT83XX_GPIO_GRC8 REG8(IT83XX_GPIO_BASE+0xF7) +#define IT83XX_GPIO_GRC19 REG8(IT83XX_GPIO_BASE+0xE4) +#define IT83XX_GPIO_GRC20 REG8(IT83XX_GPIO_BASE+0xE5) +#define IT83XX_GPIO_GRC21 REG8(IT83XX_GPIO_BASE+0xE6) +#define IT83XX_GPIO_GRC22 REG8(IT83XX_GPIO_BASE+0xE7) +#define IT83XX_GPIO_GRC23 REG8(IT83XX_GPIO_BASE+0xE8) +#define IT83XX_GPIO_GRC24 REG8(IT83XX_GPIO_BASE+0xE9) #define IT83XX_GPIO_DATA_BASE (IT83XX_GPIO_BASE + 0x00) #define IT83XX_GPIO_OUTPUT_TYPE_BASE (IT83XX_GPIO_BASE + 0x70) |