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| author | Dino Li <dino.li@ite.com.tw> | 2015-07-02 17:05:51 +0800 |
|---|---|---|
| committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2015-07-08 09:25:48 +0000 |
| commit | a69c63bae5223b6a0070ee2ab48b6c9db65dc6c7 (patch) | |
| tree | 45adb050cb7fc959f672a1413eec5677c394c3c1 /chip/it83xx/system.c | |
| parent | d6a6c927248ce16c9467dfa3f170349520cc5bc9 (diff) | |
| download | chrome-ec-a69c63bae5223b6a0070ee2ab48b6c9db65dc6c7.tar.gz | |
it8380dev: add flash module and fix system jump
1. Add flash control module for emulation board.
2. Fix system jump for Andes core.
3. Change the physical size of the flash on the chip to 256KB.
note:
1. Only IT839x series supports flash write protect by registers.
2. Static DMA method of flash code only for IT839x series and IT838x Dx.
Signed-off-by: Dino Li <dino.li@ite.com.tw>
BRANCH=none
BUG=none
TEST=1. console command flashwp and flashinfo
1-a. flashwp enable
1-b. WP asserted and reboot
1-c. flashinfo RO protected now
1-d. WP deasserted and reboot
1-e. No protected
1-f. flashwp disable
1-g. WP asserted and reboot
1-h. No protected
2. console sysjump and sysinfo
2-a. sysjump rw
2-b. jumping to image RW
2-c. sysinfo, Copy : RW, Jumped : yes
2-d. sysjump ro
2-e. jumping to image RO
2-f. sysinfo, Copy : RO, Jumped : yes
3. RO/RW firmware image test
3-a. sysjump rw
3-b. use console command "eflash" to erase RO region,
erase OK and system still work.
3-c. reflash firmware
3-d. sysjump rw, sysjump ro
3-e. use console command "eflash" to erase RW region,
erase OK and system still work.
Change-Id: I7666a095e73026a02fb812e5143bc5172ab713e8
Reviewed-on: https://chromium-review.googlesource.com/271390
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Dino Li <dino.li@ite.com.tw>
Tested-by: Dino Li <dino.li@ite.com.tw>
Diffstat (limited to 'chip/it83xx/system.c')
| -rw-r--r-- | chip/it83xx/system.c | 27 |
1 files changed, 24 insertions, 3 deletions
diff --git a/chip/it83xx/system.c b/chip/it83xx/system.c index ffeae356fe..8d434c9c5c 100644 --- a/chip/it83xx/system.c +++ b/chip/it83xx/system.c @@ -31,14 +31,23 @@ static void check_reset_cause(void) { uint32_t flags = 0; uint8_t raw_reset_cause = IT83XX_GCTRL_RSTS & 0x03; + uint8_t raw_reset_cause2 = IT83XX_GCTRL_SPCTRL4 & 0x07; /* Clear reset cause. */ - IT83XX_GCTRL_RSTS |= 0x01; + IT83XX_GCTRL_RSTS |= 0x03; + IT83XX_GCTRL_SPCTRL4 |= 0x07; /* Determine if watchdog reset or power on reset. */ - if (raw_reset_cause & 0x02) + if (raw_reset_cause & 0x02) { flags |= RESET_FLAG_WATCHDOG; - else + } else if (raw_reset_cause & 0x01) { + flags |= RESET_FLAG_POWER_ON; + } else { + if ((IT83XX_GCTRL_RSTS & 0xC0) == 0x80) + flags |= RESET_FLAG_POWER_ON; + } + + if (raw_reset_cause2 & 0x04) flags |= RESET_FLAG_POWER_ON; /* Restore then clear saved reset flags. */ @@ -167,3 +176,15 @@ int system_get_console_force_enabled(void) /* TODO(crosbug.com/p/23575): IMPLEMENT ME ! */ return 0; } + +uintptr_t system_get_fw_reset_vector(uintptr_t base) +{ + uintptr_t reset_vector, num; + + num = *(uintptr_t *)base; + reset_vector = ((num>>24)&0xff) | ((num<<8)&0xff0000) | + ((num>>8)&0xff00) | ((num<<24)&0xff000000); + reset_vector = ((reset_vector & 0xffffff) << 1) + base; + + return reset_vector; +} |