diff options
author | Jett Rink <jettrink@chromium.org> | 2018-05-21 10:22:55 -0600 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2018-05-22 21:56:39 -0700 |
commit | df06639b1d4fd2798e577f9aead6bc4495d5f3b5 (patch) | |
tree | 060bf073cf3e24c75ffb78aa62855cc28c089c42 /chip/it83xx | |
parent | fddf4e703d8673b8ea62f81c8aba3943cfeffea5 (diff) | |
download | chrome-ec-df06639b1d4fd2798e577f9aead6bc4495d5f3b5.tar.gz |
lpc/espi: convert ec chip code to use granular option
Break the ec chip code up with the more granular
CONFIG_HOSTCMD_(X86|LPC|ESPI) options.
BRANCH=none
BUG=chromium:818804
TEST=Full stack builds and works on yorp (espi) and grunt (lpc)
Change-Id: Ie272787b2425175fe36b06fcdeeee90ec5ccbe95
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1067502
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Diffstat (limited to 'chip/it83xx')
-rw-r--r-- | chip/it83xx/build.mk | 4 | ||||
-rw-r--r-- | chip/it83xx/clock.c | 10 | ||||
-rw-r--r-- | chip/it83xx/config_chip.h | 2 | ||||
-rw-r--r-- | chip/it83xx/gpio.c | 2 | ||||
-rw-r--r-- | chip/it83xx/intc.c | 6 | ||||
-rw-r--r-- | chip/it83xx/intc.h | 2 | ||||
-rw-r--r-- | chip/it83xx/lpc.c | 6 |
7 files changed, 16 insertions, 16 deletions
diff --git a/chip/it83xx/build.mk b/chip/it83xx/build.mk index 391f78b575..2d664669f7 100644 --- a/chip/it83xx/build.mk +++ b/chip/it83xx/build.mk @@ -19,8 +19,8 @@ chip-$(CONFIG_FLASH_PHYSICAL)+=flash.o chip-$(CONFIG_FPU)+=it83xx_fpu.o chip-$(CONFIG_PWM)+=pwm.o chip-$(CONFIG_ADC)+=adc.o -chip-$(CONFIG_LPC)+=lpc.o ec2i.o -chip-$(CONFIG_ESPI)+=espi.o +chip-$(CONFIG_HOSTCMD_X86)+=lpc.o ec2i.o +chip-$(CONFIG_HOSTCMD_ESPI)+=espi.o chip-$(CONFIG_SPI)+=spi.o chip-$(CONFIG_PECI)+=peci.o chip-$(HAS_TASK_KEYSCAN)+=keyboard_raw.o diff --git a/chip/it83xx/clock.c b/chip/it83xx/clock.c index 3be8c989da..a5c2840367 100644 --- a/chip/it83xx/clock.c +++ b/chip/it83xx/clock.c @@ -193,7 +193,7 @@ static void clock_set_pll(enum pll_freq_idx idx) ext_timer_ms(LOW_POWER_EXT_TIMER, EXT_PSR_32P768K_HZ, 1, 1, 5, 1, 0); task_clear_pending_irq(et_ctrl_regs[LOW_POWER_EXT_TIMER].irq); -#ifdef CONFIG_ESPI +#ifdef CONFIG_HOSTCMD_ESPI /* * Workaround for (b:70537592): * We have to set chip select pin as input mode in order to @@ -203,7 +203,7 @@ static void clock_set_pll(enum pll_freq_idx idx) #endif /* Update PLL settings. */ clock_pll_changed(); -#ifdef CONFIG_ESPI +#ifdef CONFIG_HOSTCMD_ESPI /* (b:70537592) Change back to ESPI CS# function. */ IT83XX_GPIO_GPCRM5 &= ~0xc0; #endif @@ -259,7 +259,7 @@ void clock_init(void) clock_module_disable(); -#ifdef CONFIG_LPC +#ifdef CONFIG_HOSTCMD_X86 IT83XX_WUC_WUESR4 = (1 << 2); task_clear_pending_irq(IT83XX_IRQ_WKINTAD); /* bit2, wake-up enable for LPC access */ @@ -450,7 +450,7 @@ void clock_sleep_mode_wakeup_isr(void) clock_event_timer_clock_change(EXT_PSR_8M_HZ, 0xffffffff); task_clear_pending_irq(et_ctrl_regs[EVENT_EXT_TIMER].irq); process_timers(0); -#ifdef CONFIG_LPC +#ifdef CONFIG_HOSTCMD_X86 /* disable lpc access wui */ task_disable_irq(IT83XX_IRQ_WKINTAD); IT83XX_WUC_WUESR4 = (1 << 2); @@ -490,7 +490,7 @@ void __idle(void) /* reset low power mode hw timer */ IT83XX_ETWD_ETXCTRL(LOW_POWER_EXT_TIMER) |= (1 << 1); sleep_mode_t0 = get_time(); -#ifdef CONFIG_LPC +#ifdef CONFIG_HOSTCMD_X86 /* enable lpc access wui */ task_enable_irq(IT83XX_IRQ_WKINTAD); #endif diff --git a/chip/it83xx/config_chip.h b/chip/it83xx/config_chip.h index c58060d4fa..c56a974ba1 100644 --- a/chip/it83xx/config_chip.h +++ b/chip/it83xx/config_chip.h @@ -102,7 +102,7 @@ /* Optional features present on this chip */ #define CHIP_FAMILY_IT83XX #define CONFIG_ADC -#define CONFIG_LPC +#define CONFIG_HOSTCMD_X86 #define CONFIG_SWITCH /* Chip needs to do custom pre-init */ diff --git a/chip/it83xx/gpio.c b/chip/it83xx/gpio.c index e9b87fb7ad..134d5b3472 100644 --- a/chip/it83xx/gpio.c +++ b/chip/it83xx/gpio.c @@ -523,7 +523,7 @@ static void __gpio_irq(void) } #endif -#ifdef CONFIG_LPC +#ifdef CONFIG_HOSTCMD_X86 if (irq == IT83XX_IRQ_WKINTAD) return; #endif diff --git a/chip/it83xx/intc.c b/chip/it83xx/intc.c index 2becd74b60..2d1f06b2db 100644 --- a/chip/it83xx/intc.c +++ b/chip/it83xx/intc.c @@ -47,7 +47,7 @@ void intc_cpu_int_group_5(void) int intc_group_5 = intc_get_ec_int(); switch (intc_group_5) { -#if defined(CONFIG_LPC) && defined(HAS_TASK_KEYPROTO) +#if defined(CONFIG_HOSTCMD_X86) && defined(HAS_TASK_KEYPROTO) case IT83XX_IRQ_KBC_OUT: lpc_kbc_obe_interrupt(); break; @@ -68,7 +68,7 @@ void intc_cpu_int_group_4(void) int intc_group_4 = intc_get_ec_int(); switch (intc_group_4) { -#ifdef CONFIG_LPC +#ifdef CONFIG_HOSTCMD_X86 case IT83XX_IRQ_PMC_IN: pm1_ibf_interrupt(); break; @@ -106,7 +106,7 @@ void intc_cpu_int_group_12(void) peci_interrupt(); break; #endif -#ifdef CONFIG_ESPI +#ifdef CONFIG_HOSTCMD_ESPI case IT83XX_IRQ_ESPI: espi_interrupt(); break; diff --git a/chip/it83xx/intc.h b/chip/it83xx/intc.h index 268930eee5..b24d17fd2b 100644 --- a/chip/it83xx/intc.h +++ b/chip/it83xx/intc.h @@ -25,7 +25,7 @@ void espi_interrupt(void); void espi_vw_interrupt(void); void espi_init(void); -#if defined(CONFIG_LPC) && defined(HAS_TASK_KEYPROTO) +#if defined(CONFIG_HOSTCMD_X86) && defined(HAS_TASK_KEYPROTO) void lpc_kbc_ibf_interrupt(void); void lpc_kbc_obe_interrupt(void); #endif diff --git a/chip/it83xx/lpc.c b/chip/it83xx/lpc.c index 61110498b3..cd65e3b326 100644 --- a/chip/it83xx/lpc.c +++ b/chip/it83xx/lpc.c @@ -136,7 +136,7 @@ static void keyboard_irq_assert(void) */ static void lpc_generate_smi(void) { -#ifdef CONFIG_ESPI +#ifdef CONFIG_HOSTCMD_ESPI espi_vw_set_wire(VW_SMI_L, 0); udelay(65); espi_vw_set_wire(VW_SMI_L, 1); @@ -149,7 +149,7 @@ static void lpc_generate_smi(void) static void lpc_generate_sci(void) { -#ifdef CONFIG_ESPI +#ifdef CONFIG_HOSTCMD_ESPI espi_vw_set_wire(VW_SCI_L, 0); udelay(65); espi_vw_set_wire(VW_SCI_L, 1); @@ -700,7 +700,7 @@ static void lpc_init(void) task_clear_pending_irq(IT83XX_IRQ_PMC3_IN); task_enable_irq(IT83XX_IRQ_PMC3_IN); -#ifdef CONFIG_ESPI +#ifdef CONFIG_HOSTCMD_ESPI espi_init(); #endif /* Sufficiently initialized */ |