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| author | Dino Li <Dino.Li@ite.com.tw> | 2021-01-05 16:58:29 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-01-07 03:16:49 +0000 |
| commit | 39e64924121213d910235f5c112a01f9f61c1b0f (patch) | |
| tree | 505179a76bdbf4f318121c9de633447bec5763be /chip/it83xx | |
| parent | 1c7dbb1bc0498b0e5105d5cdca01f2084658832d (diff) | |
| download | chrome-ec-39e64924121213d910235f5c112a01f9f61c1b0f.tar.gz | |
it83xx/system: introduce GPG1 reset EC feature
This CL added option of CONFIG_IT83XX_HARD_RESET_BY_GPG1.
If we enabled the option, EC will assert GPG1 pin to reset itself
instead of triggering an internal reset while receiving a reset
request.
BUG=b:173075595
BRANCH=none
TEST=Enable CONFIG_IT83XX_HARD_RESET_BY_GPG1 and check if GPG1 goes high
while receiving reset command.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Change-Id: I930424c374dcbd742b8ecca7a1fa720699d42bb6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2612233
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
Diffstat (limited to 'chip/it83xx')
| -rw-r--r-- | chip/it83xx/system.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/chip/it83xx/system.c b/chip/it83xx/system.c index 960ef7b622..0984e4bce1 100644 --- a/chip/it83xx/system.c +++ b/chip/it83xx/system.c @@ -276,6 +276,12 @@ void system_reset(int flags) if (flags & SYSTEM_RESET_HARD) IT83XX_GCTRL_ETWDUARTCR |= ETWD_HW_RST_EN; #endif + /* Set GPG1 as output high and wait until EC reset. */ + if (IS_ENABLED(CONFIG_IT83XX_HARD_RESET_BY_GPG1)) { + IT83XX_GPIO_CTRL(GPIO_G, 1) = GPCR_PORT_PIN_MODE_OUTPUT; + IT83XX_GPIO_DATA(GPIO_G) |= BIT(1); + goto system_wait_until_reset; + } /* * Writing invalid key to watchdog module triggers a soft or hardware * reset. It depends on the setting of bit0 at ETWDUARTCR register. @@ -283,6 +289,7 @@ void system_reset(int flags) IT83XX_ETWD_ETWCFG |= 0x20; IT83XX_ETWD_EWDKEYR = 0x00; +system_wait_until_reset: /* Spin and wait for reboot; should never return */ while (1) ; |