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| author | Daisuke Nojiri <dnojiri@chromium.org> | 2020-05-05 11:18:38 -0700 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-05-06 02:49:10 +0000 |
| commit | e7af52a082dbb4510fed7ea66d967f8996745de3 (patch) | |
| tree | 95c816cd506075a3be9cd8535e2d40d6841ec7dd /chip/it83xx | |
| parent | b6ae55365669cdcd6acd1251b26a347cb6cb3510 (diff) | |
| download | chrome-ec-e7af52a082dbb4510fed7ea66d967f8996745de3.tar.gz | |
it83xx: Add chip_read_reset_flags and chip_save_reset_flags
Battery backed up RAM is used to store the reset flags.
This patch wraps the code reading and writing the reset flags with
APIs for the consistency and make it available to external callers
like other chips.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=chromium:1078470
BRANCH=none
TEST=buildall
Change-Id: Ibba8078ea9fa3d7e018280254b8ca40c34e4eafe
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2182560
Reviewed-by: Craig Hesling <hesling@chromium.org>
Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Auto-Submit: Daisuke Nojiri <dnojiri@chromium.org>
Diffstat (limited to 'chip/it83xx')
| -rw-r--r-- | chip/it83xx/system.c | 35 |
1 files changed, 22 insertions, 13 deletions
diff --git a/chip/it83xx/system.c b/chip/it83xx/system.c index e56837955c..77e8c75746 100644 --- a/chip/it83xx/system.c +++ b/chip/it83xx/system.c @@ -40,15 +40,12 @@ void system_hibernate(uint32_t seconds, uint32_t microseconds) static void check_reset_cause(void) { - uint32_t flags = 0; + uint32_t flags; uint8_t raw_reset_cause = IT83XX_GCTRL_RSTS & 0x03; uint8_t raw_reset_cause2 = IT83XX_GCTRL_SPCTRL4 & 0x07; /* Restore saved reset flags. */ - flags |= BRAM_RESET_FLAGS0 << 24; - flags |= BRAM_RESET_FLAGS1 << 16; - flags |= BRAM_RESET_FLAGS2 << 8; - flags |= BRAM_RESET_FLAGS3; + flags = chip_read_reset_flags(); /* Clear reset cause. */ IT83XX_GCTRL_RSTS |= 0x03; @@ -72,10 +69,7 @@ static void check_reset_cause(void) flags &= ~EC_RESET_FLAG_WATCHDOG; /* Clear saved reset flags. */ - BRAM_RESET_FLAGS0 = 0; - BRAM_RESET_FLAGS1 = 0; - BRAM_RESET_FLAGS2 = 0; - BRAM_RESET_FLAGS3 = 0; + chip_save_reset_flags(0); system_set_reset_flags(flags); } @@ -165,6 +159,24 @@ void system_pre_init(void) } +uint32_t chip_read_reset_flags(void) +{ + uint32_t flags = 0; + flags |= BRAM_RESET_FLAGS0 << 24; + flags |= BRAM_RESET_FLAGS1 << 16; + flags |= BRAM_RESET_FLAGS2 << 8; + flags |= BRAM_RESET_FLAGS3; + return flags; +} + +void chip_save_reset_flags(uint32_t save_flags) +{ + BRAM_RESET_FLAGS0 = save_flags >> 24; + BRAM_RESET_FLAGS1 = (save_flags >> 16) & 0xff; + BRAM_RESET_FLAGS2 = (save_flags >> 8) & 0xff; + BRAM_RESET_FLAGS3 = save_flags & 0xff; +} + void system_reset(int flags) { uint32_t save_flags = 0; @@ -179,10 +191,7 @@ void system_reset(int flags) save_flags |= EC_RESET_FLAG_HIBERNATE; /* Store flags to battery backed RAM. */ - BRAM_RESET_FLAGS0 = save_flags >> 24; - BRAM_RESET_FLAGS1 = (save_flags >> 16) & 0xff; - BRAM_RESET_FLAGS2 = (save_flags >> 8) & 0xff; - BRAM_RESET_FLAGS3 = save_flags & 0xff; + chip_save_reset_flags(save_flags); /* If WAIT_EXT is set, then allow 10 seconds for external reset */ if (flags & SYSTEM_RESET_WAIT_EXT) { |