diff options
| author | Ruibin Chang <ruibin.chang@ite.com.tw> | 2020-03-31 18:34:21 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-04-07 07:12:29 +0000 |
| commit | 5e61cf5d90823c422004e96b120a0660919da91b (patch) | |
| tree | 9a01443e05422a4794cb0476190fc21b88ae4382 /chip/it83xx | |
| parent | 20b5fdd6fc75cae0784adc44b844cf74063b34ba (diff) | |
| download | chrome-ec-5e61cf5d90823c422004e96b120a0660919da91b.tar.gz | |
it83xx/gpio: disable unused cc port module
To prevent cc pins leakage and cc pins can be used as gpio.
We will check if the chip supported tcpc physical port count is
more than board active ITE port count. If yes, we will disable
unused cc port module.
BUG=none
BRANCH=none
TEST=1) on board it8xxx2_pdevb with chip it81202, check the pd
port connection with adapter and dongle when hibernate
and resume.
adapter: connect
dongle: disconnect then re-connect
2) on board it83xx_evb with chip it8320, set cc pins as
gpio, check output level when hibernate and resume.
Change-Id: I13511741b2e066dd87277db9f71f2b4a9323ad6d
Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1994693
Tested-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Commit-Queue: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Diffstat (limited to 'chip/it83xx')
| -rw-r--r-- | chip/it83xx/clock.c | 4 | ||||
| -rw-r--r-- | chip/it83xx/gpio.c | 22 |
2 files changed, 14 insertions, 12 deletions
diff --git a/chip/it83xx/clock.c b/chip/it83xx/clock.c index b0f3b09d01..c3fc6ffbf4 100644 --- a/chip/it83xx/clock.c +++ b/chip/it83xx/clock.c @@ -509,10 +509,10 @@ void __enter_hibernate(uint32_t seconds, uint32_t microseconds) if (IS_ENABLED(CONFIG_USB_PD_TCPM_ITE_ON_CHIP)) { /* - * Disable integrated pd modules in hibernate for + * Disable active pd modules in hibernate for * better power consumption. */ - for (i = 0; i < IT83XX_USBPD_PHY_PORT_COUNT; i++) + for (i = 0; i < CONFIG_USB_PD_ITE_ACTIVE_PORT_COUNT; i++) it83xx_disable_pd_module(i); } diff --git a/chip/it83xx/gpio.c b/chip/it83xx/gpio.c index cdef32384a..94e8fe211d 100644 --- a/chip/it83xx/gpio.c +++ b/chip/it83xx/gpio.c @@ -666,18 +666,20 @@ void gpio_pre_init(void) IT83XX_GPIO_GCR = 0x06; +#if IT83XX_USBPD_PHY_PORT_COUNT < CONFIG_USB_PD_ITE_ACTIVE_PORT_COUNT +#error "ITE pd active port count should be less than physical port count !" +#endif /* - * To prevent cc pins leakage ... - * If we don't use ITE TCPC: disable all ITE port cc modules. + * To prevent cc pins leakage and cc pins can be used as gpio, + * disable board not active ITE TCPC port cc modules. */ - if (!IS_ENABLED(CONFIG_USB_PD_TCPM_ITE_ON_CHIP)) { - for (i = 0; i < IT83XX_USBPD_PHY_PORT_COUNT; i++) { - it83xx_disable_cc_module(i); - /* Dis-connect 5.1K dead battery resistor to CC */ - IT83XX_USBPD_CCPSR(i) |= - (USBPD_REG_MASK_DISCONNECT_5_1K_CC2_DB | - USBPD_REG_MASK_DISCONNECT_5_1K_CC1_DB); - } + for (i = CONFIG_USB_PD_ITE_ACTIVE_PORT_COUNT; + i < IT83XX_USBPD_PHY_PORT_COUNT; i++) { + it83xx_disable_cc_module(i); + /* Dis-connect 5.1K dead battery resistor to CC */ + IT83XX_USBPD_CCPSR(i) |= + (USBPD_REG_MASK_DISCONNECT_5_1K_CC2_DB | + USBPD_REG_MASK_DISCONNECT_5_1K_CC1_DB); } #ifndef CONFIG_USB |