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authorDino Li <Dino.Li@ite.com.tw>2020-04-08 15:02:17 +0800
committerCommit Bot <commit-bot@chromium.org>2020-04-09 07:27:16 +0000
commitfe51868e3007a51e1bf343c8ae3d3630813fac55 (patch)
tree702579f6a6af77c58e3b2119d2bef0788a132000 /chip/it83xx
parent1fa8c8eb918d7f7fd136bd31a3ac24f88b34cb6d (diff)
downloadchrome-ec-fe51868e3007a51e1bf343c8ae3d3630813fac55.tar.gz
it81202/gpio: set group L and K as pull-down at default
On IT81202 (128-pins package), the pins of GPIO group K and L aren't bonding with pad. So we configure these pins as internal pull-down at default to prevent leakage current due to floating. BUG=none BRANCH=none TEST=Checking control registers of group K and L are all internal pull-down. Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Change-Id: I67abff25ba4617898203693b21eb8eb1059be910 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2141375 Reviewed-by: Jett Rink <jettrink@chromium.org>
Diffstat (limited to 'chip/it83xx')
-rw-r--r--chip/it83xx/config_chip_it8xxx2.h4
-rw-r--r--chip/it83xx/gpio.c14
2 files changed, 18 insertions, 0 deletions
diff --git a/chip/it83xx/config_chip_it8xxx2.h b/chip/it83xx/config_chip_it8xxx2.h
index d9c351e760..ac010fca41 100644
--- a/chip/it83xx/config_chip_it8xxx2.h
+++ b/chip/it83xx/config_chip_it8xxx2.h
@@ -103,6 +103,10 @@
* Please refer to gpio_1p8v_sel[] for 1.8v GPIOs.
*/
#define IT83XX_GPIO_1P8V_PIN_EXTENDED
+#ifdef CHIP_VARIANT_IT81202AX_1024
+/* Pins of group K and L are set as internal pull-down at initialization. */
+#define IT83XX_GPIO_GROUP_K_L_DEFAULT_PULL_DOWN
+#endif
/* All GPIOs support interrupt on rising, falling, and either edge. */
#define IT83XX_GPIO_INT_FLEXIBLE
/* Enable detect type-c plug in interrupt. */
diff --git a/chip/it83xx/gpio.c b/chip/it83xx/gpio.c
index 94e8fe211d..4fa062a848 100644
--- a/chip/it83xx/gpio.c
+++ b/chip/it83xx/gpio.c
@@ -711,6 +711,20 @@ void gpio_pre_init(void)
IT83XX_VBATPC_BGPOPSCR = 0x0;
#endif
+ /*
+ * On IT81202 (128-pins package), the pins of GPIO group K and L aren't
+ * bonding with pad. So we configure these pins as internal pull-down
+ * at default to prevent leakage current due to floating.
+ */
+ if (IS_ENABLED(IT83XX_GPIO_GROUP_K_L_DEFAULT_PULL_DOWN)) {
+ for (i = 0; i < 8; i++) {
+ IT83XX_GPIO_CTRL(GPIO_K, i) = (GPCR_PORT_PIN_MODE_INPUT
+ | GPCR_PORT_PIN_MODE_PULLDOWN);
+ IT83XX_GPIO_CTRL(GPIO_L, i) = (GPCR_PORT_PIN_MODE_INPUT
+ | GPCR_PORT_PIN_MODE_PULLDOWN);
+ }
+ }
+
for (i = 0; i < GPIO_COUNT; i++, g++) {
flags = g->flags;