diff options
| author | Ruibin Chang <Ruibin.Chang@ite.com.tw> | 2019-01-22 11:54:01 +0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2019-01-22 21:05:19 -0800 |
| commit | 34ad90fb651e650f41194df4ff483af6daecd808 (patch) | |
| tree | 8a9c93dccf74bd8adbad1aa02cdc2ccc015d7280 /chip/it83xx | |
| parent | 48137b5c5e0a6a1f2d78a71014a7ef580c7531d3 (diff) | |
| download | chrome-ec-34ad90fb651e650f41194df4ff483af6daecd808.tar.gz | |
tcpm/it83xx.c: don't reload cc parameter settings for Dx
The USB-PD PHY trimming value is reloaded wrongly
after software reset.
BUG=b:123173731
BRANCH=none
TEST=cc parameters are the same, after ec software reset and
hardware reset on Bx and Dx.
Change-Id: I0c7144afbb648680bb60cc128c8212abb43ccd68
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/1426300
Commit-Ready: Dino Li <Dino.Li@ite.com.tw>
Tested-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Diffstat (limited to 'chip/it83xx')
| -rw-r--r-- | chip/it83xx/config_chip.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/chip/it83xx/config_chip.h b/chip/it83xx/config_chip.h index 57fb4a4053..aed0478b35 100644 --- a/chip/it83xx/config_chip.h +++ b/chip/it83xx/config_chip.h @@ -70,6 +70,8 @@ * doesn't support a write-protect pin, and if we make the write-protection * permanent, it can't be undone easily enough to support RMA. */ #define CONFIG_FLASH_SIZE 0x00040000 +/* For IT8320BX, we have to reload cc parameters after ec softreset. */ +#define IT83XX_USBPD_CC_PARAMETER_RELOAD /* * The voltage detector of CC1 and CC2 is enabled/disabled by different bit * of the control register (bit1 and bit5 at register IT83XX_USBPD_CCCSR). |