diff options
| author | Caveh Jalali <caveh@chromium.org> | 2021-07-29 17:12:46 -0700 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-08-02 18:23:58 +0000 |
| commit | a7a96fc737e40f110bee0a33299c982cdebc7014 (patch) | |
| tree | 5848c7931999dec7c8f1905a46358c848fc58a27 /chip/it83xx | |
| parent | 32d6417df9b3c8c8dab1cc64a6989c0e444d67db (diff) | |
| download | chrome-ec-a7a96fc737e40f110bee0a33299c982cdebc7014.tar.gz | |
COIL: chip/it83xx: Rename SPI IRQ config
This renames the ITE chip specific SPI IRQ config from
IT83XX_IRQ_SPI_SLAVE to IT83XX_IRQ_SPI_PERIPHERAL.
BRANCH=none
BUG=b:181607131
TEST=compare_build.sh matches
Change-Id: Ib7a7674e6cf4f0bf81ee47b5f60225f77236f578
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3061913
Commit-Queue: Harry Cutts <hcutts@chromium.org>
Reviewed-by: Harry Cutts <hcutts@chromium.org>
Diffstat (limited to 'chip/it83xx')
| -rw-r--r-- | chip/it83xx/flash.c | 4 | ||||
| -rw-r--r-- | chip/it83xx/intc.c | 4 | ||||
| -rw-r--r-- | chip/it83xx/intc.h | 2 | ||||
| -rw-r--r-- | chip/it83xx/registers.h | 2 | ||||
| -rw-r--r-- | chip/it83xx/spi.c | 8 |
5 files changed, 10 insertions, 10 deletions
diff --git a/chip/it83xx/flash.c b/chip/it83xx/flash.c index 46a833afdb..ed02aa882f 100644 --- a/chip/it83xx/flash.c +++ b/chip/it83xx/flash.c @@ -511,12 +511,12 @@ int FLASH_DMA_CODE crec_flash_physical_erase(int offset, int size) * EC still need to handle AP's EC_CMD_GET_COMMS_STATUS command * during erasing. */ -#ifdef IT83XX_IRQ_SPI_SLAVE +#ifdef IT83XX_IRQ_SPI_PERIPHERAL if (IS_ENABLED(CONFIG_SPI) && IS_ENABLED(HAS_TASK_HOSTCMD) && IS_ENABLED(CONFIG_HOST_COMMAND_STATUS)) { if (IT83XX_SPI_RX_VLISR & IT83XX_SPI_RVLI) - task_trigger_irq(IT83XX_IRQ_SPI_SLAVE); + task_trigger_irq(IT83XX_IRQ_SPI_PERIPHERAL); } #endif } diff --git a/chip/it83xx/intc.c b/chip/it83xx/intc.c index 170e8516b2..80abfaad63 100644 --- a/chip/it83xx/intc.c +++ b/chip/it83xx/intc.c @@ -108,8 +108,8 @@ void intc_cpu_int_group_12(void) #endif #endif #ifdef CONFIG_SPI - case IT83XX_IRQ_SPI_SLAVE: - spi_slv_int_handler(); + case IT83XX_IRQ_SPI_PERIPHERAL: + spi_peripheral_int_handler(); break; #endif default: diff --git a/chip/it83xx/intc.h b/chip/it83xx/intc.h index 239a46f760..62ceb34576 100644 --- a/chip/it83xx/intc.h +++ b/chip/it83xx/intc.h @@ -45,7 +45,7 @@ void espi_enable_pad(int enable); void espi_init(void); void clock_cpu_standby(void); void spi_emmc_cmd0_isr(uint32_t *cmd0_payload); -void spi_slv_int_handler(void); +void spi_peripheral_int_handler(void); #if defined(CONFIG_HOSTCMD_X86) && defined(HAS_TASK_KEYPROTO) void lpc_kbc_ibf_interrupt(void); void lpc_kbc_obe_interrupt(void); diff --git a/chip/it83xx/registers.h b/chip/it83xx/registers.h index 24d8b38809..34a2ddd6ae 100644 --- a/chip/it83xx/registers.h +++ b/chip/it83xx/registers.h @@ -217,7 +217,7 @@ #elif defined(CHIP_FAMILY_IT8XXX1) || defined(CHIP_FAMILY_IT8XXX2) /* Group 21 */ #define IT83XX_IRQ_AUDIO_IF 170 -#define IT83XX_IRQ_SPI_SLAVE 171 +#define IT83XX_IRQ_SPI_PERIPHERAL 171 #define IT83XX_IRQ_DSP_ENGINE 172 #define IT83XX_IRQ_NN_ENGINE 173 #define IT83XX_IRQ_USBPD2 174 diff --git a/chip/it83xx/spi.c b/chip/it83xx/spi.c index 465d588fc3..63f8e4247c 100644 --- a/chip/it83xx/spi.c +++ b/chip/it83xx/spi.c @@ -234,7 +234,7 @@ void spi_event(enum gpio_signal signal) } } -void spi_slv_int_handler(void) +void spi_peripheral_int_handler(void) { if (IS_ENABLED(CONFIG_BOOTBLOCK) && (IT83XX_SPI_ISR & IT83XX_SPI_RX_FIFO_FULL) && @@ -283,7 +283,7 @@ void spi_slv_int_handler(void) } /* Clear the interrupt status */ - task_clear_pending_irq(IT83XX_IRQ_SPI_SLAVE); + task_clear_pending_irq(IT83XX_IRQ_SPI_PERIPHERAL); } static void spi_init(void) @@ -344,8 +344,8 @@ static void spi_init(void) /* SPI peripheral enable (after settings are ready) */ IT83XX_SPI_SPISGCR = IT83XX_SPI_SPISCEN; /* Enable SPI peripheral interrupt */ - task_clear_pending_irq(IT83XX_IRQ_SPI_SLAVE); - task_enable_irq(IT83XX_IRQ_SPI_SLAVE); + task_clear_pending_irq(IT83XX_IRQ_SPI_PERIPHERAL); + task_enable_irq(IT83XX_IRQ_SPI_PERIPHERAL); /* Enable SPI chip select pin interrupt */ gpio_clear_pending_interrupt(GPIO_SPI0_CS); gpio_enable_interrupt(GPIO_SPI0_CS); |