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| author | Gwendal Grignou <gwendal@chromium.org> | 2015-07-25 02:14:13 -0700 |
|---|---|---|
| committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2015-07-30 19:57:55 +0000 |
| commit | 5b71b33aba6cb0108a864cc7000918b8f06b139a (patch) | |
| tree | aa49a59a306d91b189e9fcdddc3bbb0e2deba628 /chip/it83xx | |
| parent | 9008c7a4fd131a96ccb0078a46ec545cff2f43b1 (diff) | |
| download | chrome-ec-5b71b33aba6cb0108a864cc7000918b8f06b139a.tar.gz | |
common: change interface to SPI flash
Allow more than one SPI master.
Add CONFIG variables to address the system SPI flash.
To have SPI master ports, spi_ports array must be defined.
BRANCH=smaug
TEST=compile
BUG=chrome-os-partner:42304
Change-Id: Id43869f648965c1582b7be1c7fb3a38f175fda95
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/288512
Commit-Queue: David James <davidjames@chromium.org>
Diffstat (limited to 'chip/it83xx')
| -rw-r--r-- | chip/it83xx/spi.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/chip/it83xx/spi.c b/chip/it83xx/spi.c index 12955c80e3..83eff6efe7 100644 --- a/chip/it83xx/spi.c +++ b/chip/it83xx/spi.c @@ -72,7 +72,8 @@ static void sspi_transmission_end(void) IT83XX_SSPI_SPISTS = 0x02; } -int spi_enable(int enable) +/* We assume only one SPI port in the chip, one SPI device */ +int spi_enable(int port, int enable) { if (enable) { /* @@ -96,7 +97,8 @@ int spi_enable(int enable) return EC_SUCCESS; } -int spi_transaction(const uint8_t *txdata, int txlen, +int spi_transaction(const struct spi_device_t *spi_device, + const uint8_t *txdata, int txlen, uint8_t *rxdata, int rxlen) { int idx; @@ -152,6 +154,6 @@ static void sspi_init(void) IT83XX_SSPI_SPICTRL2 |= 0x02; /* Disabling spi module */ - spi_enable(0); + spi_enable(NULL, 0); } DECLARE_HOOK(HOOK_INIT, sspi_init, HOOK_PRIO_DEFAULT); |