summaryrefslogtreecommitdiff
path: root/chip/lm4/clock.c
diff options
context:
space:
mode:
authorBill Richardson <wfrichar@chromium.org>2013-06-06 18:06:30 -0700
committerChromeBot <chrome-bot@google.com>2013-06-07 13:13:48 -0700
commit149a8457aa1796ddbb609396d28d83c1004c8846 (patch)
treeb311c0e5584728eaa0bbc4fefbcfd27bb0875335 /chip/lm4/clock.c
parentf32ad15e37dd4ada6062b5f0a709d1b3c5b6e114 (diff)
downloadchrome-ec-149a8457aa1796ddbb609396d28d83c1004c8846.tar.gz
Enable ADC charger current monitor for Slippy
The IOUT pin of the smart battery charger can be used to monitor the AC adapter current (default) or the battery charging current. BUG=none BRANCH=none TEST=manual Discharge the battery a bit, and connect to the EC console. With the AC power plugged in, the "battery" command should show charging status, including current. The "adc" command will display the A-D converters, including the current measurement. For example: > battery Temp: 0x0b88 = 295.2 K (22.1 C) Manuf: SMP-COS20 Device: OC2 Chem: LION Serial: 0x0005 V: 0x4130 = 16688 mV V-desired: 0x41a0 = 16800 mV V-design: 0x39d0 = 14800 mV I: 0x008e = 142 mA(CHG) I-desired: 0x0080 = 128 mA Mode: 0x6001 Charge: 98 % Abs: 94 % Remaining: 1871 mAh Cap-full: 1923 mAh Design: 2000 mAh Time-full: 0h:23 Empty: 0h:0 > > adc ADC channel "ECTemp" = 317 ADC channel "ChargerCurrent" = 455 > That current is significantly higher than the "I:" reported by the "battery" command. But look at the charger options: > sbc 0x12 0x7904 (30980) > Bit 5 controls the IOUT Selection. When clear, it monitors the current from the AC adapter. Set bit 5 to monitor the current provided to the battery: > sbc 0x12 0x7924 > adc ADC channel "ECTemp" = 318 ADC channel "ChargerCurrent" = 128 > That matches what the smart battery sees. Change-Id: I2fe351304421dfb22d83ef13d416aa44c9f56e8a Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/57940 Reviewed-by: Randall Spangler <rspangler@chromium.org>
Diffstat (limited to 'chip/lm4/clock.c')
-rw-r--r--chip/lm4/clock.c4
1 files changed, 0 insertions, 4 deletions
diff --git a/chip/lm4/clock.c b/chip/lm4/clock.c
index c0a5558cdb..02f955776e 100644
--- a/chip/lm4/clock.c
+++ b/chip/lm4/clock.c
@@ -27,7 +27,6 @@ static int freq;
*/
static void disable_pll(void)
{
-#ifdef BOARD_link /* FIXME: crosbug.com/p/19366 */
/* Switch to 16MHz internal oscillator and power down the PLL */
LM4_SYSTEM_RCC = LM4_SYSTEM_RCC_SYSDIV(0) |
LM4_SYSTEM_RCC_BYPASS |
@@ -35,7 +34,6 @@ static void disable_pll(void)
LM4_SYSTEM_RCC_OSCSRC(1) |
LM4_SYSTEM_RCC_MOSCDIS;
LM4_SYSTEM_RCC2 &= ~LM4_SYSTEM_RCC2_USERCC2;
-#endif
freq = INTERNAL_CLOCK;
}
@@ -48,7 +46,6 @@ static void enable_pll(void)
/* Disable the PLL so we can reconfigure it */
disable_pll();
-#ifdef BOARD_link /* FIXME: crosbug.com/p/19366 */
/*
* Enable the PLL (PWRDN is no longer set) and set divider. PLL is
* still bypassed, since it hasn't locked yet.
@@ -66,7 +63,6 @@ static void enable_pll(void)
/* Remove bypass on PLL */
LM4_SYSTEM_RCC &= ~LM4_SYSTEM_RCC_BYPASS;
-#endif
freq = PLL_CLOCK;
}