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| author | Randall Spangler <rspangler@chromium.org> | 2012-01-23 09:30:57 -0800 |
|---|---|---|
| committer | Randall Spangler <rspangler@chromium.org> | 2012-01-23 09:37:06 -0800 |
| commit | 24ac6b98c3074d4537b48f61cc0dd66ec823f735 (patch) | |
| tree | 2b16d468a3f2b64a15b1f95e58ffeeeeffc270f3 /chip/lm4/clock.c | |
| parent | b561ef5918138bcbc637b1b06184ae6d4c2c4799 (diff) | |
| download | chrome-ec-24ac6b98c3074d4537b48f61cc0dd66ec823f735.tar.gz | |
Use internal oscillator
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7677
TEST=if it runs, it works
Change-Id: Ib4f28505f6b9a21375f9c3ba97c6e8d56722c051
Diffstat (limited to 'chip/lm4/clock.c')
| -rw-r--r-- | chip/lm4/clock.c | 19 |
1 files changed, 9 insertions, 10 deletions
diff --git a/chip/lm4/clock.c b/chip/lm4/clock.c index ddde515bc4..c9afa57760 100644 --- a/chip/lm4/clock.c +++ b/chip/lm4/clock.c @@ -1,4 +1,4 @@ -/* Copyright (c) 2011 The Chromium OS Authors. All rights reserved. +/* Copyright (c) 2012 The Chromium OS Authors. All rights reserved. * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -166,6 +166,7 @@ static void clock_init_pll(uint32_t value) /* Put a bypass on the system clock PLLs, no divider */ LM4_SYSTEM_RCC = (LM4_SYSTEM_RCC | 0x800) & ~0x400000; LM4_SYSTEM_RCC2 = (LM4_SYSTEM_RCC2 | 0x800) & ~0x80000000; + /* Enable main and precision internal oscillators */ LM4_SYSTEM_RCC &= ~0x3; /* wait 1 million CPU cycles */ @@ -173,25 +174,23 @@ static void clock_init_pll(uint32_t value) /* clear PLL lock flag (aka PLLLMIS) */ LM4_SYSTEM_MISC = 0x40; - /* clear powerdown / set XTAL frequency and divider */ - LM4_SYSTEM_RCC = (LM4_SYSTEM_RCC & ~0x07c027c0) | (value & 0x07c007c0); + /* clear powerdown / set XTAL frequency, divider, and source */ + LM4_SYSTEM_RCC = (LM4_SYSTEM_RCC & ~0x07c027f0) | (value & 0x07c007f0); /* wait 32 CPU cycles */ wait_cycles(16); /* wait for PLL to lock */ while (!(LM4_SYSTEM_RIS & 0x40)); - /* Remove bypass on PLL and set oscillator source to main */ - LM4_SYSTEM_RCC = LM4_SYSTEM_RCC & ~0x830; + /* Remove bypass on PLL */ + LM4_SYSTEM_RCC = LM4_SYSTEM_RCC & ~0x800; } int clock_init(void) { - /* Use 66.667Mhz clock from PLL */ + /* CPU clock = PLL/3 = 66.667MHz; System clock = PLL */ BUILD_ASSERT(CPU_CLOCK == 66666667); - /* CPU clock = PLL/3 ; System clock = PLL - * Osc source = main OSC ; external crystal = 16 Mhz - */ - clock_init_pll(0x01400540); + /* Osc source = internal 16MHz oscillator */ + clock_init_pll(0x01400550); #ifdef CONFIG_DEBUG /* Register our internal commands */ |