diff options
author | Bill Richardson <wfrichar@chromium.org> | 2013-05-10 13:44:02 -0700 |
---|---|---|
committer | ChromeBot <chrome-bot@google.com> | 2013-05-10 16:37:11 -0700 |
commit | f10abeb19fd74573ddb7ceb582906a765a9be60b (patch) | |
tree | 83ec60319f033eb52616a69ac14313b5f2da0a82 /chip/lm4/clock.c | |
parent | 1e4b0b6194b3ff16233e824daa4bab18a8dcce0f (diff) | |
download | chrome-ec-f10abeb19fd74573ddb7ceb582906a765a9be60b.tar.gz |
Slippy: Changes needed to boot EC without bricking.
This commits the hacks made during board bringup. Bugs can be filed and
fixed based on this starting point.
BUG=chrome-os-partner:18825
BRANCH=slippy
TEST=manual
Try it and see.
Change-Id: Ia663eaf9a357633873b1b5d5cc6dbdda63513082
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50875
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'chip/lm4/clock.c')
-rw-r--r-- | chip/lm4/clock.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/chip/lm4/clock.c b/chip/lm4/clock.c index fea8873969..05a0aac36f 100644 --- a/chip/lm4/clock.c +++ b/chip/lm4/clock.c @@ -27,6 +27,7 @@ static int freq; */ static void disable_pll(void) { +#ifndef BOARD_slippy /* FIXME: crosbug.com/p/19366 */ /* Switch to 16MHz internal oscillator and power down the PLL */ LM4_SYSTEM_RCC = LM4_SYSTEM_RCC_SYSDIV(0) | LM4_SYSTEM_RCC_BYPASS | @@ -34,6 +35,7 @@ static void disable_pll(void) LM4_SYSTEM_RCC_OSCSRC(1) | LM4_SYSTEM_RCC_MOSCDIS; LM4_SYSTEM_RCC2 &= ~LM4_SYSTEM_RCC2_USERCC2; +#endif freq = INTERNAL_CLOCK; } @@ -46,6 +48,7 @@ static void enable_pll(void) /* Disable the PLL so we can reconfigure it */ disable_pll(); +#ifndef BOARD_slippy /* FIXME: crosbug.com/p/19366 */ /* * Enable the PLL (PWRDN is no longer set) and set divider. PLL is * still bypassed, since it hasn't locked yet. @@ -63,7 +66,7 @@ static void enable_pll(void) /* Remove bypass on PLL */ LM4_SYSTEM_RCC &= ~LM4_SYSTEM_RCC_BYPASS; - +#endif freq = PLL_CLOCK; } @@ -93,6 +96,7 @@ int clock_get_freq(void) void clock_init(void) { +#ifndef BOARD_slippy /* FIXME: crosbug.com/p/19366 */ #ifdef BOARD_bds /* * Perform an auto calibration of the internal oscillator using the @@ -116,6 +120,7 @@ void clock_init(void) */ LM4_SYSTEM_MOSCCTL = 0x04; #endif +#endif /* * TODO: UART seems to glitch unless we wait 500k cycles before |