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| author | Randall Spangler <rspangler@chromium.org> | 2013-05-24 11:44:27 -0700 |
|---|---|---|
| committer | ChromeBot <chrome-bot@google.com> | 2013-05-24 16:27:48 -0700 |
| commit | b144a584af63891b134c3f789fdd00ac232a9577 (patch) | |
| tree | e16aea3d30c038cac3e48a55afd54f05280a4d75 /chip/lm4/flash.c | |
| parent | 3443478d7659d8222222c073fb8ed2e6164b93d9 (diff) | |
| download | chrome-ec-b144a584af63891b134c3f789fdd00ac232a9577.tar.gz | |
Remove 64-byte workaround from STM32L flash writing
This was left over from ancient code where host commands only had a
64-byte payload, and page writes need to happen in 128-byte
increments. This is no longer an issue with SPI host interface.
Also added capability for word writes, since that'll be necessary for
writing pstate (in the next CL).
BUG=chrome-os-partner:9526
BRANCH=none
TEST=hack flashwrite command in flash_common.c to allow write size = 4 bytes
flasherase 0x1fc00 0x400
flashwrite 0x1fc00 0x100 -> success; uses fast path
flashwrite 0x1fd00 4 -> success; uses word-write path
Change-Id: I61434d8f714ea46deb65cadd82c45a61ad0ce68b
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/56627
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'chip/lm4/flash.c')
0 files changed, 0 insertions, 0 deletions