coil: cleanup commentsstabilize-rust-13720.B-cr50_stab

BUG=b:175244613
TEST=make buildall -j

Change-Id: Icbd143b072fdd5df3b67d7e5a09ee6c01a77f6b9
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2622889
Reviewed-by: Namyoon Woo <namyoon@chromium.org>

1 files changed, 9 insertions, 6 deletions

diff --git a/chip/lm4/lpc.c b/chip/lm4/lpc.c
index 0c672bd63a..8a59d6b434 100644
--- a/chip/lm4/lpc.c
+++ b/chip/lm4/lpc.c
@@ -759,16 +759,19 @@ static void lpc_init(void)
 #endif
 
 	/*
-	 * Ensure the EC (slave) has control of the memory-mapped I/O space.
-	 * Once the EC has won arbitration for the memory-mapped space, it will
-	 * keep control of it until it writes the last byte in the space.
-	 * (That never happens; we can't use the last byte in the space because
-	 * ACPI can't see it anyway.)
+	 * Ensure the EC (peripheral) has control of the memory-mapped I/O
+	 * space. Once the EC has won arbitration for the memory-mapped space,
+	 * it will keep control of it until it writes the last byte in the
+	 * space. (That never happens; we can't use the last byte in the space
+	 * because ACPI can't see it anyway.)
 	 */
 	while (!(LM4_LPC_ST(LPC_CH_MEMMAP) & 0x10)) {
 		/* Clear HW1ST */
 		LM4_LPC_ST(LPC_CH_MEMMAP) &= ~0x40;
-		/* Do a dummy slave write; this should cause SW1ST to be set */
+		/*
+		 * Do a dummy peripheral write; this should cause SW1ST to be
+		 * set.
+		 */
 		*LPC_POOL_MEMMAP = *LPC_POOL_MEMMAP;
 	}