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| author | Randall Spangler <rspangler@chromium.org> | 2013-04-11 13:02:27 -0700 |
|---|---|---|
| committer | ChromeBot <chrome-bot@google.com> | 2013-04-11 15:38:09 -0700 |
| commit | 79c6132a6e6d9b5d00a33d7f73795cd88bd97017 (patch) | |
| tree | 30943690ad8c61650359017b153cce026dc4a926 /chip/lm4/spi.c | |
| parent | b9d0d9c60b2b826f37192f6ffb96b23f1c18d6de (diff) | |
| download | chrome-ec-79c6132a6e6d9b5d00a33d7f73795cd88bd97017.tar.gz | |
Allow GPIO alternate function 0
gpio_set_alternate_function() used 0 to mean "normal GPIO function".
But on chips like STM32L, alternate function 0 is actually a function
on some pins. So change "normal GPIO function" to -1.
Also add support for this on STM32L.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build and boot link and daisy
Change-Id: I9cdd9ad91a315b616e373a0dc9a50545cf9d20fa
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/47903
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Diffstat (limited to 'chip/lm4/spi.c')
| -rw-r--r-- | chip/lm4/spi.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/chip/lm4/spi.c b/chip/lm4/spi.c index 09a5ec03a8..4607f7460c 100644 --- a/chip/lm4/spi.c +++ b/chip/lm4/spi.c @@ -1,4 +1,4 @@ -/* Copyright (c) 2012 The Chromium OS Authors. All rights reserved. +/* Copyright (c) 2013 The Chromium OS Authors. All rights reserved. * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -41,7 +41,7 @@ int spi_enable(int enable) gpio_set_flags(GPIO_SPI_CSn, GPIO_HI_Z); /* PA2,4,5 normal function (high-Z GPIOs) */ - gpio_set_alternate_function(LM4_GPIO_A, 0x34, 0); + gpio_set_alternate_function(LM4_GPIO_A, 0x34, -1); } return EC_SUCCESS; |