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| author | Vincent Palatin <vpalatin@chromium.org> | 2012-01-26 01:20:30 +0000 |
|---|---|---|
| committer | Vincent Palatin <vpalatin@chromium.org> | 2012-01-26 01:55:37 +0000 |
| commit | 09b937b767266f07eda0bff0f34a50983c4b7b56 (patch) | |
| tree | b767e5b41825e2547834fb37d8c85841f284103b /chip/lm4/uart.c | |
| parent | 1f00fc154af5e367c2347e4c951fe08719c7e269 (diff) | |
| download | chrome-ec-09b937b767266f07eda0bff0f34a50983c4b7b56.tar.gz | |
Ensure the panic UART is set to the right UART
Preparatory work to introduce a second SoC : 2nd series 4/4
Add a build time assertion which checks whether the UART used in the C
uart code is the same one as the one defined for assembly panic code.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=build for BDS with both good and bad address in CONFIG_UART_ADDRESS
Change-Id: I28dd6089bc938f06be0654d7bed75d7d698fafe0
Diffstat (limited to 'chip/lm4/uart.c')
| -rw-r--r-- | chip/lm4/uart.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/chip/lm4/uart.c b/chip/lm4/uart.c index 1282e42e6f..26373e21e5 100644 --- a/chip/lm4/uart.c +++ b/chip/lm4/uart.c @@ -174,6 +174,12 @@ int uart_init(void) volatile uint32_t scratch __attribute__((unused)); int ch; + /* + * Check that the UART parameters used for panic/watchdog are matching + * the UART0 parameters. + */ + BUILD_ASSERT(LM4_UART_CH0_BASE == CONFIG_UART_ADDRESS); + /* Enable UART0 and UART1 and delay a few clocks */ LM4_SYSTEM_RCGCUART |= 0x03; scratch = LM4_SYSTEM_RCGCUART; |