Clean up configuring GPIO alternate functions

GPIO alternate functions used to be configured throughout the code,
which made it hard to tell which ones you needed to configure yourself
in board.c.  It also sometimes (chip/lm4/i2c.c) led to GPIOs being
configured as alternate functions even if they weren't used on a given
board.

With this change, every board has a table in board.c which lists ALL
GPIOs which have alternate functions.  This is now the only place
where alternate functions are configured.  Each module then calls
gpio_init_module() to set up its GPIOs.

This also fixes a bug where gpio_set_flags() ignored most of the flags
passed to it (only direction and level were actually used).

On stm32f, gpio_set_alternate() does not exist, and pins are
configured via direct register writes from board.c.  Rather than
attempt to change that in the same CL, I've stubbed out
gpio_set_alternate() for stm32f, and will fix the register writes in a
follow-up CL.

BUG=chrome-os-partner:21618
BRANCH=peppy (fixes I2C1 being initialized even though those pins are used
       for other things)
TEST=boot link, falco, pit, spring

Change-Id: I40f47025d8f767e0723c6b40c80413af9ba8deba
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/64400

9 files changed, 66 insertions, 125 deletions

diff --git a/chip/lm4/gpio.c b/chip/lm4/gpio.c
index ab6423d570..d3a060904d 100644
--- a/chip/lm4/gpio.c
+++ b/chip/lm4/gpio.c
@@ -74,7 +74,6 @@ void gpio_set_alternate_function(int port, int mask, int func)
 	} else {
 		LM4_GPIO_AFSEL(port) &= ~mask;
 	}
-	LM4_GPIO_DEN(port) |= mask;
 }
 
 test_mockable int gpio_get_level(enum gpio_signal signal)
@@ -93,58 +92,59 @@ void gpio_set_level(enum gpio_signal signal, int value)
 		      gpio_list[signal].mask) = (value ? 0xff : 0);
 }
 
-void gpio_set_flags(enum gpio_signal signal, int flags)
+void gpio_set_flags_by_mask(uint32_t port, uint32_t mask, uint32_t flags)
 {
-	const struct gpio_info *g = gpio_list + signal;
+	/*
+	 * Select open drain first, so that we don't glitch the signal
+	 * when changing the line to an output.
+	 */
+	if (flags & GPIO_OPEN_DRAIN)
+		LM4_GPIO_ODR(port) |= mask;
+	else
+		LM4_GPIO_ODR(port) &= ~mask;
 
-	if (flags & GPIO_OUTPUT) {
-		/*
-		 * Select open drain first, so that we don't glitch the signal
-		 * when changing the line to an output.
-		 */
-		if (g->flags & GPIO_OPEN_DRAIN)
-			LM4_GPIO_ODR(g->port) |= g->mask;
-		else
-			LM4_GPIO_ODR(g->port) &= ~g->mask;
-
-		LM4_GPIO_DIR(g->port) |= g->mask;
-
-		/* Set level if necessary */
-		if (flags & GPIO_HIGH)
-			gpio_set_level(signal, 1);
-		else if (flags & GPIO_LOW)
-			gpio_set_level(signal, 0);
-	} else {
-		/* Input */
-		LM4_GPIO_DIR(g->port) &= ~g->mask;
-	}
+	if (flags & GPIO_OUTPUT)
+		LM4_GPIO_DIR(port) |= mask;
+	else
+		LM4_GPIO_DIR(port) &= ~mask;
 
 	/* Handle pullup / pulldown */
-	if (g->flags & GPIO_PULL_UP) {
-		LM4_GPIO_PUR(g->port) |= g->mask;
-	} else if (g->flags & GPIO_PULL_DOWN) {
-		LM4_GPIO_PDR(g->port) |= g->mask;
+	if (flags & GPIO_PULL_UP) {
+		LM4_GPIO_PUR(port) |= mask;
+	} else if (flags & GPIO_PULL_DOWN) {
+		LM4_GPIO_PDR(port) |= mask;
 	} else {
 		/* No pull up/down */
-		LM4_GPIO_PUR(g->port) &= ~g->mask;
-		LM4_GPIO_PDR(g->port) &= ~g->mask;
+		LM4_GPIO_PUR(port) &= ~mask;
+		LM4_GPIO_PDR(port) &= ~mask;
 	}
 
 	/* Set up interrupt type */
-	if (g->flags & GPIO_INT_LEVEL)
-		LM4_GPIO_IS(g->port) |= g->mask;
+	if (flags & GPIO_INT_LEVEL)
+		LM4_GPIO_IS(port) |= mask;
 	else
-		LM4_GPIO_IS(g->port) &= ~g->mask;
+		LM4_GPIO_IS(port) &= ~mask;
 
-	if (g->flags & (GPIO_INT_RISING | GPIO_INT_HIGH))
-		LM4_GPIO_IEV(g->port) |= g->mask;
+	if (flags & (GPIO_INT_RISING | GPIO_INT_HIGH))
+		LM4_GPIO_IEV(port) |= mask;
 	else
-		LM4_GPIO_IEV(g->port) &= ~g->mask;
+		LM4_GPIO_IEV(port) &= ~mask;
 
-	if (g->flags & GPIO_INT_BOTH)
-		LM4_GPIO_IBE(g->port) |= g->mask;
+	if (flags & GPIO_INT_BOTH)
+		LM4_GPIO_IBE(port) |= mask;
 	else
-		LM4_GPIO_IBE(g->port) &= ~g->mask;
+		LM4_GPIO_IBE(port) &= ~mask;
+
+	if (flags & GPIO_ANALOG)
+		LM4_GPIO_DEN(port) &= ~mask;
+	else
+		LM4_GPIO_DEN(port) |= mask;
+
+	/* Set level */
+	if (flags & GPIO_HIGH)
+		LM4_GPIO_DATA(port, mask) = 0xff;
+	else if (flags & GPIO_LOW)
+		LM4_GPIO_DATA(port, mask) = 0;
 }
 
 int gpio_enable_interrupt(enum gpio_signal signal)
@@ -210,7 +210,7 @@ void gpio_pre_init(void)
 			flags &= ~(GPIO_LOW | GPIO_HIGH);
 
 		/* Set up GPIO based on flags */
-		gpio_set_flags(i, flags);
+		gpio_set_flags_by_mask(g->port, g->mask, flags);
 
 		/* Use as GPIO, not alternate function */
 		gpio_set_alternate_function(g->port, g->mask, -1);
diff --git a/chip/lm4/i2c.c b/chip/lm4/i2c.c
index abf82f62f4..8fc1591338 100644
--- a/chip/lm4/i2c.c
+++ b/chip/lm4/i2c.c
@@ -236,30 +236,6 @@ exit:
 	return rv;
 }
 
-/**
- * Configure I2C GPIOs for the module.
- */
-static void configure_i2c_gpios(void)
-{
-#ifdef BOARD_bds
-	/* PG6:7 = I2C5 SCL/SDA */
-	gpio_set_alternate_function(LM4_GPIO_G, 0xc0, 3);
-
-	/* Configure SDA as open-drain.  SCL should not be open-drain,
-	 * since it has an internal pull-up. */
-	LM4_GPIO_ODR(LM4_GPIO_G) |= 0x80;
-#else
-	/* PA6:7 = I2C1 SCL/SDA; PB2:3 = I2C0 SCL/SDA; PB6:7 = I2C5 SCL/SDA */
-	gpio_set_alternate_function(LM4_GPIO_A, 0xc0, 3);
-	gpio_set_alternate_function(LM4_GPIO_B, 0xcc, 3);
-
-	/* Configure SDA as open-drain.  SCL should not be open-drain,
-	 * since it has an internal pull-up. */
-	LM4_GPIO_ODR(LM4_GPIO_A) |= 0x80;
-	LM4_GPIO_ODR(LM4_GPIO_B) |= 0x88;
-#endif
-}
-
 /*****************************************************************************/
 /* Hooks */
 
@@ -308,7 +284,7 @@ static void i2c_init(void)
 	clock_wait_cycles(3);
 
 	/* Configure GPIOs */
-	configure_i2c_gpios();
+	gpio_config_module(MODULE_I2C, 1);
 
 	/* No tasks are waiting on ports */
 	for (i = 0; i < I2C_PORT_COUNT; i++)
diff --git a/chip/lm4/lpc.c b/chip/lm4/lpc.c
index c3cc908ed7..04563caf66 100644
--- a/chip/lm4/lpc.c
+++ b/chip/lm4/lpc.c
@@ -75,20 +75,6 @@ static uint8_t * const cmd_params = (uint8_t *)LPC_POOL_CMD_DATA +
 static struct ec_lpc_host_args * const lpc_host_args =
 	(struct ec_lpc_host_args *)LPC_POOL_CMD_DATA;
 
-/* Configure GPIOs for module */
-static void configure_gpio(void)
-{
-	/*
-	 * Set digital alternate function 15 for PL0:5, PM0:2, PM4:5 pins.
-	 *
-	 * I/O: PL0:3 = command/address/data
-	 * inp: PL4 (frame), PL5 (reset), PM0 (powerdown), PM5 (clock)
-	 * out: PM1 (sci), PM4 (serirq)
-	 */
-	gpio_set_alternate_function(LM4_GPIO_L, 0x3f, 0x0f);
-	gpio_set_alternate_function(LM4_GPIO_M, 0x33, 0x0f);
-}
-
 static void wait_irq_sent(void)
 {
 	/*
@@ -679,7 +665,7 @@ static void lpc_init(void)
 	LM4_LPC_LPCIRQCTL = 0;
 
 	/* Configure GPIOs */
-	configure_gpio();
+	gpio_config_module(MODULE_LPC, 1);
 
 	/*
 	 * Set LPC channel 0 to I/O address 0x62 (data) / 0x66 (command),
diff --git a/chip/lm4/peci.c b/chip/lm4/peci.c
index b547165b49..b791c97a89 100644
--- a/chip/lm4/peci.c
+++ b/chip/lm4/peci.c
@@ -40,18 +40,6 @@
 static int temp_vals[TEMP_AVG_LENGTH];
 static int temp_idx = 0;
 
-/**
- * Configure the GPIOs for the PECI module.
- */
-static void configure_gpios(void)
-{
-	/* PJ6 alternate function 1 = PECI Tx */
-	gpio_set_alternate_function(LM4_GPIO_J, 0x40, 1);
-
-	/* PJ7 analog input = PECI Rx (comparator) */
-	LM4_GPIO_DEN(LM4_GPIO_J) &= ~0x80;
-}
-
 int peci_get_cpu_temp(void)
 {
 	int v = LM4_PECI_M0D0 & 0xffff;
@@ -120,15 +108,14 @@ DECLARE_HOOK(HOOK_FREQ_CHANGE, peci_freq_changed, HOOK_PRIO_DEFAULT - 1);
 
 static void peci_init(void)
 {
-	volatile uint32_t scratch  __attribute__((unused));
 	int i;
 
 	/* Enable the PECI module and delay a few clocks */
 	LM4_SYSTEM_RCGCPECI = 1;
-	scratch = LM4_SYSTEM_RCGCPECI;
+	clock_wait_cycles(3);
 
 	/* Configure GPIOs */
-	configure_gpios();
+	gpio_config_module(MODULE_PECI, 1);
 
 	/* Set initial clock frequency */
 	peci_freq_changed();
diff --git a/chip/lm4/pwm_fan.c b/chip/lm4/pwm_fan.c
index 525b9daca2..6309867dae 100644
--- a/chip/lm4/pwm_fan.c
+++ b/chip/lm4/pwm_fan.c
@@ -278,7 +278,7 @@ static void pwm_fan_init(void)
 	clock_wait_cycles(3);
 
 	/* Configure GPIOs */
-	configure_fan_gpios();
+	gpio_config_module(MODULE_PWM_FAN, 1);
 
 	/* Disable all fans */
 	LM4_FAN_FANCTL = 0;
diff --git a/chip/lm4/pwm_kblight.c b/chip/lm4/pwm_kblight.c
index df9f965bda..f4628303c9 100644
--- a/chip/lm4/pwm_kblight.c
+++ b/chip/lm4/pwm_kblight.c
@@ -124,7 +124,7 @@ static void pwm_kblight_init(void)
 	clock_wait_cycles(3);
 
 	/* Configure GPIOs */
-	configure_kblight_gpios();
+	gpio_config_module(MODULE_PWM_KBLIGHT, 1);
 
 	/* Disable all fans */
 	LM4_FAN_FANCTL = 0;
diff --git a/chip/lm4/registers.h b/chip/lm4/registers.h
index 4185d7ed50..30332d792b 100644
--- a/chip/lm4/registers.h
+++ b/chip/lm4/registers.h
@@ -445,6 +445,23 @@ static inline int lm4_fan_addr(int ch, int offset)
 #define LM4_GPIO_AMSEL(port)          LM4GPIOREG(port, 0x528)
 #define LM4_GPIO_PCTL(port)           LM4GPIOREG(port, 0x52c)
 
+/* Chip-independent aliases for port base addresses */
+#define GPIO_A LM4_GPIO_A
+#define GPIO_B LM4_GPIO_B
+#define GPIO_C LM4_GPIO_C
+#define GPIO_D LM4_GPIO_D
+#define GPIO_E LM4_GPIO_E
+#define GPIO_F LM4_GPIO_F
+#define GPIO_G LM4_GPIO_G
+#define GPIO_H LM4_GPIO_H
+#define GPIO_J LM4_GPIO_J
+#define GPIO_K LM4_GPIO_K
+#define GPIO_L LM4_GPIO_L
+#define GPIO_M LM4_GPIO_M
+#define GPIO_N LM4_GPIO_N
+#define GPIO_P LM4_GPIO_P
+#define GPIO_Q LM4_GPIO_Q
+
 /* Value to write to LM4_GPIO_LOCK to unlock writes */
 #define LM4_GPIO_LOCK_UNLOCK          0x4c4f434b
 
diff --git a/chip/lm4/spi.c b/chip/lm4/spi.c
index 7d3b6485d7..6526ded82c 100644
--- a/chip/lm4/spi.c
+++ b/chip/lm4/spi.c
@@ -22,8 +22,7 @@
 int spi_enable(int enable)
 {
 	if (enable) {
-		/* SSI0 on PA2(CLK), PA4(RX), PA5(TX) alternate function 2 */
-		gpio_set_alternate_function(LM4_GPIO_A, 0x34, 2);
+		gpio_config_module(MODULE_SPI, 1);
 		/* Don't use the SSI0 frame output.  CS# is a GPIO so we can
 		 * keep it low during an entire transaction. */
 		gpio_set_flags(GPIO_SPI_CSn, GPIO_OUTPUT);
@@ -39,8 +38,7 @@ int spi_enable(int enable)
 		gpio_set_level(GPIO_SPI_CSn, 1);
 		gpio_set_flags(GPIO_SPI_CSn, GPIO_ODR_HIGH);
 
-		/* PA2,4,5 normal function (high-Z GPIOs) */
-		gpio_set_alternate_function(LM4_GPIO_A, 0x34, -1);
+		gpio_config_module(MODULE_SPI, 0);
 	}
 
 	return EC_SUCCESS;
diff --git a/chip/lm4/uart.c b/chip/lm4/uart.c
index 15b83e5551..17443d9848 100644
--- a/chip/lm4/uart.c
+++ b/chip/lm4/uart.c
@@ -139,28 +139,6 @@ static void uart_host_interrupt(void)
 /* Must be same prio as LPC interrupt handler so they don't preempt */
 DECLARE_IRQ(CONFIG_UART_HOST_IRQ, uart_host_interrupt, 2);
 
-/**
- * Configure GPIOs for the UART module.
- */
-static void configure_gpio(void)
-{
-	/* UART0 RX and TX are GPIO PA0:1 alternate function 1 */
-	gpio_set_alternate_function(LM4_GPIO_A, 0x03, 1);
-
-#if (CONFIG_UART_HOST == 1) && defined(CONFIG_UART_HOST_GPIOS_PC4_5)
-	/* UART1 RX and TX are GPIO PC4:5 alternate function 2 */
-	gpio_set_alternate_function(LM4_GPIO_C, 0x30, 2);
-#elif (CONFIG_UART_HOST == 1) && defined(CONFIG_UART_HOST_GPIOS_PB0_1)
-	/* UART1 RX and TX are GPIO PB0:1 alternate function 1 */
-	gpio_set_alternate_function(LM4_GPIO_B, 0x03, 1);
-#elif (CONFIG_UART_HOST == 2) && defined(CONFIG_UART_HOST_GPIOS_PG4_5)
-	/* UART2 RX and TX are GPIO PG4:5 alternate function 1 */
-	gpio_set_alternate_function(LM4_GPIO_G, 0x30, 1);
-#else
-#error "Must put Host UART GPIOs somewhere"
-#endif
-}
-
 static void uart_config(int port)
 {
 	/* Disable the port */
@@ -201,8 +179,7 @@ void uart_init(void)
 	LM4_SYSTEM_RCGCUART |= (1 << CONFIG_UART_HOST) | 1;
 	scratch = LM4_SYSTEM_RCGCUART;
 
-	/* Configure GPIOs */
-	configure_gpio();
+	gpio_config_module(MODULE_UART, 1);
 
 	/* Configure UARTs (identically) */
 	uart_config(0);