diff options
| author | Martin Roth <martinroth@chromium.org> | 2016-10-25 17:31:20 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2016-11-15 17:41:55 -0800 |
| commit | 651f8b9acd6a692fa21fa6e0891fffd240522d89 (patch) | |
| tree | 0dcfa8ffe5aff84a3fb6d9933ed433249d1711e8 /chip/lm4 | |
| parent | 897ce78bddb26557a686ab9e756fcf3d6c121271 (diff) | |
| download | chrome-ec-651f8b9acd6a692fa21fa6e0891fffd240522d89.tar.gz | |
chip/g to chip/lm4: fix more misspellings in comments
No functional changes.
BUG=none
BRANCH=none
TEST=make buildall passes
Change-Id: I0c4fcc900ec0326d6904aa14f298206e62be0fda
Signed-off-by: Martin Roth <martinroth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/403418
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Diffstat (limited to 'chip/lm4')
| -rw-r--r-- | chip/lm4/config_chip.h | 2 | ||||
| -rw-r--r-- | chip/lm4/lpc.c | 4 | ||||
| -rw-r--r-- | chip/lm4/system.c | 2 | ||||
| -rw-r--r-- | chip/lm4/watchdog.c | 2 |
4 files changed, 5 insertions, 5 deletions
diff --git a/chip/lm4/config_chip.h b/chip/lm4/config_chip.h index ac12470097..31ee2f6b9b 100644 --- a/chip/lm4/config_chip.h +++ b/chip/lm4/config_chip.h @@ -9,7 +9,7 @@ /* CPU core BFD configuration */ #include "core/cortex-m/config_core.h" -/* 16.000 Mhz internal oscillator frequency (PIOSC) */ +/* 16.000 MHz internal oscillator frequency (PIOSC) */ #define INTERNAL_CLOCK 16000000 /* Number of IRQ vectors on the NVIC */ diff --git a/chip/lm4/lpc.c b/chip/lm4/lpc.c index 646ad30150..4da0f8e1f8 100644 --- a/chip/lm4/lpc.c +++ b/chip/lm4/lpc.c @@ -813,7 +813,7 @@ static void lpc_init(void) #endif /* CONFIG_UART_HOST */ /* - * Unmaksk LPC bus reset interrupt. This lets us monitor the PCH + * Unmask LPC bus reset interrupt. This lets us monitor the PCH * PLTRST# signal for debugging. */ LM4_LPC_LPCIM |= (1 << 31); @@ -833,7 +833,7 @@ static void lpc_init(void) /* * Ensure the EC (slave) has control of the memory-mapped I/O space. - * Once the EC has won arbtration for the memory-mapped space, it will + * Once the EC has won arbitration for the memory-mapped space, it will * keep control of it until it writes the last byte in the space. * (That never happens; we can't use the last byte in the space because * ACPI can't see it anyway.) diff --git a/chip/lm4/system.c b/chip/lm4/system.c index 3f39da0a32..cb1cf8cef0 100644 --- a/chip/lm4/system.c +++ b/chip/lm4/system.c @@ -301,7 +301,7 @@ void system_set_rtc_alarm(uint32_t seconds, uint32_t microseconds) * Wait for the write to commit. This ensures that the RTC interrupt * actually gets enabled. This is important if we're about to switch * the system to the 30 kHz oscillator, which might prevent the write - * from comitting. + * from committing. */ wait_for_hibctl_wc(); } diff --git a/chip/lm4/watchdog.c b/chip/lm4/watchdog.c index 565ce69fd4..f743077441 100644 --- a/chip/lm4/watchdog.c +++ b/chip/lm4/watchdog.c @@ -31,7 +31,7 @@ void IRQ_HANDLER(LM4_IRQ_WATCHDOG)(void) asm volatile("mov r0, lr\n" "mov r1, sp\n" /* Must push registers in pairs to keep 64-bit aligned - * stack for ARM EABI. This also conveninently saves + * stack for ARM EABI. This also conveniently saves * R0=LR so we can pass it to task_resched_if_needed. */ "push {r0, lr}\n" "bl watchdog_trace\n" |