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authorFurquan Shaikh <furquan@chromium.org>2017-11-14 18:51:42 -0800
committerchrome-bot <chrome-bot@chromium.org>2017-11-21 18:53:35 -0800
commitc9cd870600b12123dddc88814446327337557369 (patch)
treee1e24ad901e91e98831b38c1ccd315cb272b9a6a /chip/lm4
parent0da531fae0099080b7dd472ade0788c18162cc19 (diff)
downloadchrome-ec-c9cd870600b12123dddc88814446327337557369.tar.gz
host_events: Bump up host events and masks to 64-bit
With the upcoming change to add a new command to get/set/clear host events and masks, it seems to be the right time to bump up the host events and masks to 64-bit. We are already out of available host events. This change opens up at least 32 bits for new host events. Old EC commands to operate on host events/masks will still deal with lower 32-bits of the events/mask. On the other hand, the new command being added will take care of the entire 64-bit events/masks. This ensures that old BIOS and kernel versions can still work with the newer EC versions. BUG=b:69329196 BRANCH=None TEST=make -j buildall. Verified: 1. hostevent set 0x4000 ==> Sets correct bit in host events 2. hostevent clear 0x4000 ==> Clears correct bit in host events 3. Kernel is able to query and read correct host event bits from EC. Verified using evtest. 4. Coreboot is able to read correct wake reason from EC. Verified using mosys eventlog list. Change-Id: Idcb24ea364ac6c491efc2f8dd9e29a9df6149e07 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/770925 Reviewed-by: Randall Spangler <rspangler@chromium.org>
Diffstat (limited to 'chip/lm4')
-rw-r--r--chip/lm4/lpc.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/chip/lm4/lpc.c b/chip/lm4/lpc.c
index 8068940d70..f2f1cb0549 100644
--- a/chip/lm4/lpc.c
+++ b/chip/lm4/lpc.c
@@ -149,7 +149,7 @@ static inline void keyboard_irq_assert(void)
*/
static void lpc_generate_smi(void)
{
- uint32_t smi;
+ host_event_t smi;
/* Enforce signal-high for long enough to debounce high */
gpio_set_level(GPIO_PCH_SMI_L, 1);
@@ -162,7 +162,7 @@ static void lpc_generate_smi(void)
smi = lpc_get_host_events_by_type(LPC_HOST_EVENT_SMI);
if (smi)
- CPRINTS("smi 0x%08x", smi);
+ HOST_EVENT_CPRINTS("smi", smi);
}
/**
@@ -170,7 +170,7 @@ static void lpc_generate_smi(void)
*/
static void lpc_generate_sci(void)
{
- uint32_t sci;
+ host_event_t sci;
#ifdef CONFIG_SCI_GPIO
/* Enforce signal-high for long enough to debounce high */
@@ -187,7 +187,7 @@ static void lpc_generate_sci(void)
sci = lpc_get_host_events_by_type(LPC_HOST_EVENT_SCI);
if (sci)
- CPRINTS("sci 0x%08x", sci);
+ HOST_EVENT_CPRINTS("sci", sci);
}
/**
@@ -195,7 +195,7 @@ static void lpc_generate_sci(void)
*
* @param wake_events Currently asserted wake events
*/
-static void lpc_update_wake(uint32_t wake_events)
+static void lpc_update_wake(uint64_t wake_events)
{
/*
* Mask off power button event, since the AP gets that through a
@@ -368,7 +368,7 @@ void lpc_update_host_event_status(void)
LM4_LPC_ST(LPC_CH_ACPI) &= ~LM4_LPC_ST_SCI;
/* Copy host events to mapped memory */
- *(uint32_t *)host_get_memmap(EC_MEMMAP_HOST_EVENTS) =
+ *(host_event_t *)host_get_memmap(EC_MEMMAP_HOST_EVENTS) =
lpc_get_host_events();
task_enable_irq(LM4_IRQ_LPC);