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| author | Scott Worley <scott.worley@microchip.corp-partner.google.com> | 2021-03-10 12:33:45 -0500 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-03-30 06:01:03 +0000 |
| commit | c54fe67838b339a1f97673a0ccdfe76b27a0d29f (patch) | |
| tree | fd2b0a100ed4ef71402fb6f993de4013ef507670 /chip/mchp/pwm_chip.h | |
| parent | afac41c853eee51a03a223dfdc2f1114eef2b272 (diff) | |
| download | chrome-ec-c54fe67838b339a1f97673a0ccdfe76b27a0d29f.tar.gz | |
mchp: PWM add MEC172x and clean up
Add MEC172x PWM support and clean up the hard coded PWM PCR
numeric values with PWM PCR register defines for (SZ) 144 pin
parts. MEC1701, MEC152x, and MEC172x 144 pin parts have 9 PWM's.
MEC152x and MEC172x have 4 TACH's. MEC1701 has 3 TACH's.
BRANCH=none
BUG=none
TEST=Build MCHP MEC170x and MEC152x boards
Signed-off-by: Scott Worley <scott.worley@microchip.corp-partner.google.com>
Change-Id: Ibd69d6391975668186679812ff74435856baea60
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2748856
Reviewed-by: Martin Yan <martin.yan@microchip.corp-partner.google.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Ravin Kumar <ravin.kumar@microchip.com>
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Martin Yan <martin.yan@microchip.corp-partner.google.com>
Diffstat (limited to 'chip/mchp/pwm_chip.h')
| -rw-r--r-- | chip/mchp/pwm_chip.h | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/chip/mchp/pwm_chip.h b/chip/mchp/pwm_chip.h index 85ff484f86..f828a234a7 100644 --- a/chip/mchp/pwm_chip.h +++ b/chip/mchp/pwm_chip.h @@ -7,6 +7,34 @@ #ifndef __CROS_EC_PWM_CHIP_H #define __CROS_EC_PWM_CHIP_H +/* + * MEC152x SZ 144-pin has 9 PWM and 4 TACH + * MEC170x SZ 144-pin has 9 PWM and 3 TACH + * MEC172x SZ 144-pin has 9 PWM and 4 TACH + */ +enum pwm_hw_id { + PWM_HW_CH_0 = 0, + PWM_HW_CH_1, + PWM_HW_CH_2, + PWM_HW_CH_3, + PWM_HW_CH_4, + PWM_HW_CH_5, + PWM_HW_CH_6, + PWM_HW_CH_7, + PWM_HW_CH_8, + PWM_HW_CH_COUNT +}; + +enum tach_hw_id { + TACH_HW_CH_0 = 0, + TACH_HW_CH_1, + TACH_HW_CH_2, +#ifndef CHIP_FAMILY_MEC170X + TACH_HW_CH_3, +#endif + TACH_HW_CH_COUNT +}; + /* Data structure to define PWM channels. */ struct pwm_t { /* PWM Channel ID */ |