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authorScott Worley <scott.worley@microchip.corp-partner.google.com>2021-03-10 12:33:45 -0500
committerCommit Bot <commit-bot@chromium.org>2021-03-30 06:01:03 +0000
commitc54fe67838b339a1f97673a0ccdfe76b27a0d29f (patch)
treefd2b0a100ed4ef71402fb6f993de4013ef507670 /chip/mchp/registers-mec1701.h
parentafac41c853eee51a03a223dfdc2f1114eef2b272 (diff)
downloadchrome-ec-c54fe67838b339a1f97673a0ccdfe76b27a0d29f.tar.gz
mchp: PWM add MEC172x and clean up
Add MEC172x PWM support and clean up the hard coded PWM PCR numeric values with PWM PCR register defines for (SZ) 144 pin parts. MEC1701, MEC152x, and MEC172x 144 pin parts have 9 PWM's. MEC152x and MEC172x have 4 TACH's. MEC1701 has 3 TACH's. BRANCH=none BUG=none TEST=Build MCHP MEC170x and MEC152x boards Signed-off-by: Scott Worley <scott.worley@microchip.corp-partner.google.com> Change-Id: Ibd69d6391975668186679812ff74435856baea60 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2748856 Reviewed-by: Martin Yan <martin.yan@microchip.corp-partner.google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Ravin Kumar <ravin.kumar@microchip.com> Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Martin Yan <martin.yan@microchip.corp-partner.google.com>
Diffstat (limited to 'chip/mchp/registers-mec1701.h')
-rw-r--r--chip/mchp/registers-mec1701.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/chip/mchp/registers-mec1701.h b/chip/mchp/registers-mec1701.h
index fc9131326d..04f80dd905 100644
--- a/chip/mchp/registers-mec1701.h
+++ b/chip/mchp/registers-mec1701.h
@@ -977,8 +977,8 @@
#define MCHP_P80_CNT_MASK0 0xfffffful
#define MCHP_P80_CNT_MASK ((MCHP_P80_CNT_MASK0) << (MCHP_P80_CNT_BITPOS))
-/* PWM */
-#define MCHP_PWM_INSTANCES 12
+/* PWM SZ 144 pin package has 9 PWM's */
+#define MCHP_PWM_INSTANCES 9
#define MCHP_PWM_ID_MAX (MCHP_PWM_INSTANCES)
#define MCHP_PWM_SPACING 16
#define MCHP_PWM_BASE(x) (MCHP_PWM_0_BASE + ((x) * MCHP_PWM_SPACING))