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authorScott Worley <scott.worley@microchip.corp-partner.google.com>2020-12-22 12:26:50 -0500
committerCommit Bot <commit-bot@chromium.org>2021-02-10 02:27:56 +0000
commitec4988dae66f18356ae688520fb11fdea826af92 (patch)
tree09a23b195f1f514a2b1ec3f9a5d6b4b62493024c /chip/mchp
parentd798d5ed5fcee714ae4466f076b121a041806765 (diff)
downloadchrome-ec-ec4988dae66f18356ae688520fb11fdea826af92.tar.gz
mchp: MEC152x update PWM instances
Adjust chip PWM code for the different number of PWM instances based upon chip family. BRANCH=none BUG=b:177463787 TEST=Booted skylake RVP to Chrome OS Signed-off-by: Scott Worley <scott.worley@microchip.corp-partner.google.com> Change-Id: Ie42bb99120d2811f81a49678102a78f8a1ce868b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2601209 Reviewed-by: Ravin Kumar <ravin.kumar@microchip.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Ravin Kumar <ravin.kumar@microchip.com>
Diffstat (limited to 'chip/mchp')
-rw-r--r--chip/mchp/pwm.c15
1 files changed, 11 insertions, 4 deletions
diff --git a/chip/mchp/pwm.c b/chip/mchp/pwm.c
index 53a8c15806..7a1b2c8c79 100644
--- a/chip/mchp/pwm.c
+++ b/chip/mchp/pwm.c
@@ -30,15 +30,19 @@
*/
static uint32_t pwm_keep_awake_mask;
-const uint8_t pwm_slp_bitpos[12] = {
- 4, 20, 21, 22, 23, 24, 25, 26, 27, 31, 0, 1
+const uint8_t pwm_slp_bitpos[] = {
+ 4, 20, 21, 22, 23, 24, 25, 26, 27,
+#if defined(CHIP_FAMILY_MEC170X)
+ 31, 0, 1
+#endif
};
+BUILD_ASSERT(ARRAY_SIZE(pwm_slp_bitpos) == MCHP_PWM_ID_MAX);
static uint32_t pwm_get_sleep_mask(int id)
{
uint32_t bitpos = 32;
- if (id < 12)
+ if (id < MCHP_PWM_ID_MAX)
bitpos = (uint32_t)pwm_slp_bitpos[id];
return (1ul << bitpos);
@@ -114,7 +118,7 @@ static void pwm_configure(int ch, int active_low, int clock_low)
(clock_low ? BIT(1) : 0);
}
-static const uint16_t pwm_pcr[MCHP_PWM_ID_MAX] = {
+static const uint16_t pwm_pcr[] = {
MCHP_PCR_PWM0,
MCHP_PCR_PWM1,
MCHP_PCR_PWM2,
@@ -124,10 +128,13 @@ static const uint16_t pwm_pcr[MCHP_PWM_ID_MAX] = {
MCHP_PCR_PWM6,
MCHP_PCR_PWM7,
MCHP_PCR_PWM8,
+#if defined(CHIP_FAMILY_MEC170X)
MCHP_PCR_PWM9,
MCHP_PCR_PWM10,
MCHP_PCR_PWM11,
+#endif
};
+BUILD_ASSERT(ARRAY_SIZE(pwm_pcr) == MCHP_PWM_ID_MAX);
static void pwm_slp_en(int pwm_id, int sleep_en)
{