summaryrefslogtreecommitdiff
path: root/chip/mec1322/config_chip.h
diff options
context:
space:
mode:
authorShawn Nematbakhsh <shawnn@chromium.org>2015-05-11 10:16:41 -0700
committerChromeOS Commit Bot <chromeos-commit-bot@chromium.org>2015-05-12 20:54:37 +0000
commit39bd18b890bb708e79e9ba50dd3b5bf3d35e9ff1 (patch)
tree69b9331013e942bcbae05c10f863ad0ae9bc4f3b /chip/mec1322/config_chip.h
parent3a36c29e6756231f2fb1fdd26447d519cbd5b26a (diff)
downloadchrome-ec-39bd18b890bb708e79e9ba50dd3b5bf3d35e9ff1.tar.gz
cleanup: Rename image geometry CONFIGs
Rename image geometry configs with a uniform naming scheme to make their purposes more clear. CONFIG_RO_MEM_OFF (was CONFIG_FW_RO_OFF) - RO image offset in program memory CONFIG_RO_STORAGE_OFF (was CONFIG_RO_SPI_OFF) - RO image offset on storage CONFIG_RO_SIZE (was CONFIG_FW_RO_SIZE) - Size of RO image CONFIG_RW_MEM_OFF (was CONFIG_FW_RW_OFF) - RW image offset in program memory CONFIG_RW_STORAGE_OFF (was CONFIG_RW_SPI_OFF) - RW image offset on storage CONFIG_RW_SIZE (was CONFIG_FW_RW_SIZE) - Size of RW image CONFIG_WP_OFF (was CONFIG_FW_WP_RO_OFF) - Offset of WP region on storage CONFIG_WP_SIZE (was CONFIG_FW_WP_RO_SIZE) - Size of WP region on storage BUG=chrome-os-partner:39741,chrome-os-partner:23796 TEST=Set date / version strings to constants then `make buildall -j`. Verify that each ec.bin image is identical pre- and post-change. BRANCH=None Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I6ea0a4e456dae71c266fa917a309b9f6fa4b50cd Reviewed-on: https://chromium-review.googlesource.com/270189 Reviewed-by: Anton Staaf <robotboy@chromium.org>
Diffstat (limited to 'chip/mec1322/config_chip.h')
-rw-r--r--chip/mec1322/config_chip.h20
1 files changed, 10 insertions, 10 deletions
diff --git a/chip/mec1322/config_chip.h b/chip/mec1322/config_chip.h
index 3accdfdf63..ffdf0e56d4 100644
--- a/chip/mec1322/config_chip.h
+++ b/chip/mec1322/config_chip.h
@@ -110,20 +110,20 @@
#endif
/* RO/RW firmware must be after Loader code */
-#define CONFIG_FW_RO_OFF CONFIG_FW_LOADER_SIZE
+#define CONFIG_RO_MEM_OFF CONFIG_FW_LOADER_SIZE
-#define CONFIG_FW_RO_SIZE CONFIG_FW_IMAGE_SIZE
+#define CONFIG_RO_SIZE CONFIG_FW_IMAGE_SIZE
#define CONFIG_FLASH_SIZE CONFIG_FLASH_PHYSICAL_SIZE
#define CONFIG_FW_INCLUDE_RO
-#define CONFIG_FW_RW_OFF CONFIG_FW_RO_OFF
-#define CONFIG_FW_RW_SIZE CONFIG_FW_RO_SIZE
+#define CONFIG_RW_MEM_OFF CONFIG_RO_MEM_OFF
+#define CONFIG_RW_SIZE CONFIG_RO_SIZE
/* Write protect Loader and RO Image */
-#define CONFIG_FW_WP_RO_OFF CONFIG_FW_LOADER_OFF
+#define CONFIG_WP_OFF CONFIG_FW_LOADER_OFF
/* Write protect 128k section of 256k physical flash
which contains Loader and RO Images */
-#define CONFIG_FW_WP_RO_SIZE (CONFIG_FLASH_PHYSICAL_SIZE >> 1)
+#define CONFIG_WP_SIZE (CONFIG_FLASH_PHYSICAL_SIZE >> 1)
/****************************************************************************/
/* SPI Flash Memory Mapping */
@@ -132,12 +132,12 @@ which contains Loader and RO Images */
#define CONFIG_FLASH_BASE_SPI (CONFIG_SPI_FLASH_SIZE - (0x40000))
#define CONFIG_RO_WP_SPI_OFF 0x20000
-#define CONFIG_RO_SPI_OFF 0x20000
-#define CONFIG_RW_SPI_OFF 0
+#define CONFIG_RO_STORAGE_OFF 0x20000
+#define CONFIG_RW_STORAGE_OFF 0
#define CONFIG_RO_IMAGE_FLASHADDR (CONFIG_FLASH_BASE_SPI + \
- CONFIG_RO_SPI_OFF)
+ CONFIG_RO_STORAGE_OFF)
#define CONFIG_RW_IMAGE_FLASHADDR (CONFIG_FLASH_BASE_SPI + \
- CONFIG_RW_SPI_OFF)
+ CONFIG_RW_STORAGE_OFF)
/* Memory Lcation shared between lfw and RO/RWimage */
#define SHARED_RAM_LFW_RORW (CONFIG_MEC_SRAM_BASE_START + \
(CONFIG_LOADER_IMAGE_SIZE - 4))